TC74HC4060AP(F) Toshiba

TC74HC4060AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4060AP, TC74HC4060AF 14-Stage Binary Counter/Oscillator The TC74HC4060A is a high speed CMOS 14-STAGE BINARY 2 TC74HC4060AP COUNTER fabricated with silicon gate C MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The oscillator configuration allows designs using either RC or crystal oscillator circuits, or an external clock may be used. The clear input resets the counter to a low level on all outputs and disables the oscillator. A high CLR accomplishes this reset function. A negative transition on the clock input ( I) increments the counter Ten levels of divided output are provided 4 stage thru 10 TC74HC4060AF stage and 12 stage thru 14 stage. At the last stage (Q14), a 1/16384 divided frequency is obtained. The I input and CLR input are equipped with protection circuits against static discharge or transient excess voltage. Features High speed: f = 58 MHz (typ.) at V = 5 V max CC Low power dissipation: I = 4 A (max) at Ta = 25C CC High noise immunity: V = V = 28% V (min) NIH NIL CC Weight DIP16-P-300-2.54A : 1.00 g (typ.) Output drive capability: 10 LSTTL loads SOP16-P-300-1.27A : 0.18 g (typ.) Symmetrical output impedance: I = I = 4 mA (min) OH OL Balanced propagation delays: t t pLH pHL Wide operating voltage range: V (opr) = 2 to 6 V CC Oscillator configuration: RC or crystal oscillator Pin and function compatible with 4060B Pin Assignment Start of commercial production 1987-11 1 2014-03-01 TC74HC4060AP/AF IEC Logic Symbol Truth Table Inputs Function I CLR Counter is reset to zero state. X H O output goes to high level. O output goes to low level. L Count up one step. L No Change System Diagram 2 2014-03-01