TC74HC4094AF(F) Toshiba

TC74HC4094AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4094AP, TC74HC4094AF 8-Bit Shift and Store Register (3-state) The TC74HC4094A is a high speed CMOS 8-BIT SHIFT AND TC74HC4094AP 2 STROBE REGISTER fabricated with silicon gate C MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It consists of an 8-bit shift register and an 8-bit latch with 3-state output buffers. Data is shifted serially though the shift register on the positive going transition of the CK input. The output of the last stage (Qs) can be used to cascade several devices. Data on the Qs output is transferred to a second output (Qs) on the following negative transition of the CK input. The TC74HC4094AF data in each stage of the shift register is provided to a corresponding latch, on the negative going transition of the STROBE input. When STROBE is held high, data propagates through the latch to a 3-state output buffer. This buffer is enabled when OUTPUT ENABLE input is set high. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features High speed: f = 73 MHz (typ.) at V = 5 V max CC Weight Low power dissipation: I = 4 A (max) at Ta = 25C DIP16-P-300-2.54A : 1.00 g (typ.) CC SOP16-P-300-1.27A : 0.18 g (typ.) High noise immunity: V = V = 28% V (min) NIH NIL CC Output drive capability: 10 LSTTL loads Symmetrical output impedance: I = I = 4 mA (min) OH OL Balanced propagation delays: t t pLH pHL Wide operating voltage range: V (opr) = 2 to 6 V CC Pin and function compatible with 4094B Pin Assignment Start of commercial production 1986-05 1 2014-03-01 TC74HC4094AP/AF IEC Logic Symbol Truth Table Para. Out Seri. Out CK OE ST SI Q1 Qn Qs Qs H H L L Qn 1 Q7 NC H H H H Qn 1 Q7 NC H L * NC NC Q7 NC L * * Z Z Q7 NC H * * NC NC NC Qs L * * Z Z NC Qs X: Dont care NC: No change Z : High impedance Timing Chart 2 2014-03-01