TC74VHC123AF/AFK,TC74VHC221AF/AFK CMOS Digital Integrated Circuits Silicon Monolithic TC74VHC123AF,TC74VHC123AFK, TC74VHC123AF,TC74VHC123AFK,TC74VHC123AF,TC74VHC123AFK,TC74VHC123AF,TC74VHC123AFK, TC74VHC221AF,TC74VHC221AFKTC74VHC221AF,TC74VHC221AFK TC74VHC221AF,TC74VHC221AFKTC74VHC221AF,TC74VHC221AFK 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description Dual Monostable Multivibrator TC74VHC123AF/AFK: Retriggerable TC74VHC221AF/AFK: Non-Retriggerable 2. 2. 2. 2. GeneralGeneralGeneralGeneral The TC74VHC123A/221A are high speed CMOS MONOSTABLE MULTIVIBRATOR fabricated with silicon gate C2MOS technology. There are two trigger inputs, A input (negative edge), and B input (positive edge). These inputs are valid for a slow rise/fall time signal (t = t = 1 s) as they are schmitt trigger inputs. This device may also be triggered by r f using CLR input (positive edge). After triggering, the output stays in a MONOSTABLE state for a time period determined by the external resistor and capacitor (R , C ). A low level at the CLR input breaks this state. X X Limits for C and R are: X X External capacitor, C : No limit X External resistor, R : V = 2.0 V more than 5 k X CC V 3.0 V more than 1 k CC An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. 3. 3. Features (Note)Features (Note) 3. 3. Features (Note)Features (Note) (1) High speed: Propagation delay time = 8.1 ns (typ.) at V = 5.0 V CC (2) Low power dissipation: Standby state: 4.0 A (max) at T = 25 a Active state: 750 A (max) at T = 25 a (3) High noise immunity: V = V = 28 % V (min) NIH NIL CC (4) Power-down protection is provided on all inputs. (5) Balanced propagation delays: t t PLH PHL (6) Wide operating voltage range: V = 2.0 to 5.5 V CC(opr) (7) Pin and function compatible with TC74HC123A,TC74HC221A type. Note: In the case of using only one circuit, CLR should be tied to GND, R /C C QQ should be tied to OPEN, X X X the other inputs should be tied to V or GND. CC Start of commercial production 2013-05 2016-2017 2017-11-30 1 Toshiba Electronic Devices & Storage Corporation Rev.4.0TC74VHC123AF/AFK,TC74VHC221AF/AFK 4. 4. 4. 4. PackagingPackagingPackagingPackaging TC74VHC123AFK, TC74VHC123AF,TC74VHC221AF TC74VHC221AFK SOP16 US16 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 6. 6. 6. 6. IEC Logic SymbolIEC Logic SymbolIEC Logic SymbolIEC Logic Symbol TC74VHC123AF,TC74VHC123AFK TC74VHC221AF,TC74VHC221AFK 2016-2017 2017-11-30 2 Toshiba Electronic Devices & Storage Corporation Rev.4.0