TC7MP245FK(EL) Toshiba

TC7MP245FK/FTG TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7MP245FK, TC7MP245FTG Low-Voltage/Low-Power Octal Bus Transceiver with Bus-hold TC7MP245FK The TC7MP245 is a high-performance CMOS octal bus transceiver. By a low power consumption circuit, power consumption has been reduced when a bus terminal is disable state (OE=High). The direction of data transmission is determined by the level of the DIR input. The OE input can be used to disable the device so that the busses are effectively isolated. But, bus of a B bus side at floating state is maintained in an appropriate logic level due to a bus hold circuit to a B bus. Moreover, the bus-hold circuit which is added to a B bus is off when OE is low. All inputs are equipped with protection circuits against static TC7MP245FTG discharge. VQON20-P-0404-0.50 Weight: VSSOP20-P-0030-0.50 : 0.03 g (typ.) Features VQON20-P-0404-0.50 : 0.0145 g (typ.) Low-voltage operation : V = 1.65 to 3.6 V CC Low power current consumption : By a new input circuit, power consumption in OE=H is reduced largely. It is most suitable for battery drive products such as personal digital assistant or a cellular phone. Quiescent supply current : I = 5 A (max) (V =3.6V) CC CC High-speed operation : t = 3.0 ns( max) (V =3.30.3V) pd CC t = 4.6 ns (max) (V =2.50.2V) pd CC t = 10.0 ns (max) (V =1.80.15V) pd CC Output current : I /I (A bus) = 12mA (min) (V =3.0V) OHA OLA CC : I /I (B bus) = 24mA (min) (V =3.0V) OHB OLB CC Latch-up performance : 300mA ESD performance : Machine model 200 V Human body model 2000 V Ultra-small package : VSSOP(US20), VQON20 Bus hold circuit is built in only the B bus side.(Only in OE=H, a former state is maintained.) Floating of A-bus and B-bus are permitted.(When OE=H) Gate IC for control(TC7MP01FK) of DIR and OE terminal are prepared. 3.6V tolerant function provided on A-bus terminal, DIR and OE terminal. Note 1: At the time bus terminal is enable state, please do not give a signal from the outside. Note 2: When mounting VQON package, the type of recommended flux is RA or RMA. Start of commercial production 2002-03 1 2014-03-01 TC7MP245FK/FTG Pin Assighment (top view) FK (VSSOP20-P-0030-0.50) FTG (VQON20-P-0404-0.50) A1 DIR V OE B1 CC DIR 1 20 V CC 20 19 18 17 16 A1 2 19 OE A2 1 15 B2 A2 3 18 B1 A3 2 14 B3 A3 4 17 B2 A4 3 13 B4 A4 5 16 B3 A5 4 12 B5 A5 6 15 B4 A6 5 11 B6 A6 7 14 B5 A7 8 13 B6 6 7 8 9 10 A8 9 12 B7 A7 A8 GND B8 B7 GND 10 11 B8 Truth Table Marking FTG (VQON20-P-0404-0.50) Input Bus hold circuit Bus state (B bus) DIR OE Product Name L L B A(B=A) OFF P 0 0A H L A B(A=B) OFF X H Z ON* Lot trace code ** * * X: Dont care Z: High impedance *: Logic state just before becoming disable is maintained. 1 pin Note: When a bus input is in state and an output is switched to enabl todisabl, Glitch such as state during about 1 to 3ns occurs in an output. It is not generated when a bus input is in state. System Diagram OE DIR A1 B1 1/8 2 2014-03-01