650V-80mW SiC FET Rev. A, August 2019 DATASHEET Description This SiC FET device is based on a unique cascode circuit UF3C065080K3S configuration, in which a normally-on SiC JFET is co-packaged with a Si MOSFET to produce a normally-off SiC FET device. The devices standard gate-drive characteristics allows for a true drop-in replacement to Si IGBTs, Si FETs, SiC MOSFETs or Si superjunction devices. Available in the TO-247-3L package, this device exhibits ultra- low gate charge and exceptional reverse recovery characteristics, making it ideal for switching inductive loads when used with recommended RC-snubbers, and any application requiring standard CASE CASE gate drive. D (2) Features w Typical on-resistance R of 80mW DS(on),typ w Maximum operating temperature of 175C w Excellent reverse recovery G (1) w Low gate charge w Low intrinsic capacitance w ESD protected, HBM class 2 1 2 3 w Very low switching losses (required RC-snubber loss negligible . S (3) under typical operating conditions) Typical applications Part Number Package Marking w EV charging UF3C065080K3S TO-247-3L UF3C065080K3S w PV inverters w Switch mode power supplies w Power factor correction modules w Motor drives w Induction heating Datasheet: UF3C065080K3S Rev. A, August 2019 1Maximum Ratings Parameter Symbol Test Conditions Value Units V Drain-source voltage 650 V DS Gate-source voltage V DC -25 to +25 V GS T = 25C 31 A C 1 I Continuous drain current D T = 100C 23 A C 2 T = 25C Pulsed drain current I 65 A C DM 3 L=15mH, I =2.1A E 33 mJ Single pulsed avalanche energy AS AS T = 25C Power dissipation P 190 W C tot Maximum junction temperature T 175 C J,max Operating and storage temperature T , T -55 to 175 C J STG Max. lead temperature for soldering, T 250 C L 1/8 from case for 5 seconds 1. Limited by T J,max 2. Pulse width t limited by T p J,max 3. Starting T = 25C J Thermal Characteristics Value Parameter Symbol Test Conditions Units Min Typ Max Thermal resistance, junction-to-case R 0.61 0.79 C/W qJC Datasheet: UF3C065080K3S Rev. A, August 2019 2