New Product SiE726DF Vishay Siliconix N-Channel 30-V (D-S) MOSFET with Schottky Diode FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 a I (A) D Definition SkyFET Monolithic TrenchFET Silicon Package e V (V) Q (Typ.) DS R () g Limit Limit Power MOSFET and Schottky Diode DS(on) Ultra Low Thermal Resistance Using Top- 0.0024 at V = 10 V 175 60 GS Exposed PolarPAK Package for Double- 30 50 nC 0.0033 at V = 4.5 V 149 60 GS Sided Cooling Leadframe-Based New Encapsulated Package - Die Not Exposed Package Drawing www.vishay.com/doc 72945 - Same Layout Regardless of Die Size Low Q /Q Ratio Helps Prevent Shoot-Through gd gs PolarPAK 100 % R and UIS Tested 10 9 8 7 6 g D G S S D 67 8 9 10 Compliant to RoHS directive 2002/95/EC APPLICATIONS D Synchronous Rectification DC/DC D DS G D Low-Side Switch Schottky Diode G D G S S D 5 432 1 1 2 3 4 5 N-Channel MOSFET Top View Bottom View Top surface is connected to pins 1, 5, 6, and 10 S Ordering Information: SiE726DF-T1-E3 (Lead (Pb)-free) For Related Documents SiE726DF-T1-GE3 (Lead (Pb)-free and Halogen-free) www.vishay.com/ppg 68626 ABSOLUTE MAXIMUM RATINGS T = 25 C, unless otherwise noted A Parameter Symbol Limit Unit V Drain-Source Voltage 30 DS V Gate-Source Voltage V 20 GS 175 (Silicon Limit) T = 25 C C a 60 (Package Limit) a Continuous Drain Current (T = 150 C) I T = 70 C J D 60 C b, c T = 25 C 35 A b, c T = 70 C A 28 A Pulsed Drain Current I 80 DM a T = 25 C 60 C Continuous Source-Drain Diode Current I b, c S T = 25 C 4.3 A I Single Pulse Avalanche Current 50 AS L = 0.1 mH Avalanche Energy E 125 mJ AS T = 25 C 125 C T = 70 C 80 C Maximum Power Dissipation P W D b, c T = 25 C 5.2 A b, c T = 70 C 3.3 A Operating Junction and Storage Temperature Range T , T - 55 to 150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 Notes: a. Package limited. b. Surface Mounted on 1 x 1 FR4 board. c. t = 10 s. d. See Solder Profile (www.vishay.com/ppg 73257). The PolarPAK is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. Document Number: 68626 www.vishay.com S09-1338-Rev. B, 13-Jul-09 1New Product SiE726DF Vishay Siliconix THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit a, b R t 10 s 20 24 Maximum Junction-to-Ambient thJA R (Drain) Maximum Junction-to-Case (Drain Top) 0.8 1 C/W thJC Steady State a, c R (Source) 2.2 2.7 Maximum Junction-to-Case (Source) thJC Notes: a. Surface Mounted on 1 x 1 FR4 board. b. Maximum under Steady State conditions is 68 C/W. c. Measured at source pin (on the side of the package). SPECIFICATIONS T = 25 C, unless otherwise noted J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = 1 mA 30 V DS GS D V Gate-Source Threshold Voltage V = V , I = 250 A 1 3 V GS(th) DS GS D I Gate-Source Leakage V = 0 V, V = 20 V 100 nA GSS DS GS V = 30 V, V = 0 V 0.120 0.5 DS GS I Zero Gate Voltage Drain Current mA DSS V = 30 V, V = 0 V, T = 55 C 1.0 10 DS GS J a I V 5 V, V = 10 V 25 A On-State Drain Current D(on) DS GS V = 10 V, I = 25 A 0.0020 0.0024 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 25 A 0.0026 0.0033 GS D a g V = 15 V, I = 25 A 90 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 7400 iss C V = 15 V, V = 0 V, f = 1 MHz Output Capacitance 1100 pF oss DS GS C Reverse Transfer Capacitance 400 rss V = 15 V, V = 10 V, I = 20 A 105 160 DS GS D Q Total Gate Charge g 50 75 nC Q V = 15 V, V = 4.5 V, I = 20 A Gate-Source Charge 22 gs DS GS D Q Gate-Drain Charge 12 gd Gate Resistance R f = 1 MHz 1 2 g t Turn-On Delay Time 60 90 d(on) t Rise Time V = 15 V, R = 1.5 35 55 r DD L t I 10 A, V = 4.5 V, R = 1 Turn-Off Delay Time 55 85 d(off) D GEN g t Fall Time 30 45 f ns t Turn-On Delay Time 20 30 d(on) t V = 15 V, R = 1.5 Rise Time 10 15 r DD L t I 10 A, V = 10 V, R = 1 Turn-Off Delay Time 55 85 d(off) D GEN g t Fall Time 10 15 f Drain-Source Body Diode and Schottky Characteristics I Continuous Source-Drain Diode Current T = 25 C 60 S C A a I 80 SM Pulse Diode Forward Current V Body Diode Voltage I = 2 A 0.37 0.45 V SD S t Body Diode Reverse Recovery Time 40 60 ns rr Q Body Diode Reverse Recovery Charge 30 45 nC rr I = 10 A, dI/dt = 100 A/s, T = 25 C F J t Reverse Recovery Fall Time 19 a ns t Reverse Recovery Rise Time 21 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 % b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 68626 2 S09-1338-Rev. B, 13-Jul-09