SiE818DF Vishay Siliconix N-Channel 75-V (D-S) MOSFET FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 a I (A) Definition D TrenchFET Power MOSFET Silicon Package e V (V) R () Q (Typ.) Ultra Low Thermal Resistance Using Top- Limit Limit DS DS(on) g Exposed PolarPAK Package for Double- 0.0095 at V = 10 V 79 60 GS 75 33 nC Sided Cooling 0.0125 at V = 4.5 V 69 60 GS Leadframe-Based New Encapsulated Package - Die Not Exposed - Same Layout Regardless of Die Size Package Drawing www.vishay.com/doc 72945 Low Q /Q Ratio Helps Prevent Shoot-Through gd gs 100 % R and UIS Tested PolarPAK g 10 9 8 7 6 Compliant to RoHS directive 2002/95/EC D G S S D 67 8 9 10 APPLICATIONS Primary Side Switch D Half-Bridge D DS G D Synchronous Rectification G D G S S D 5 432 1 1 2 3 4 5 Top View Bottom View S Top surface is connected to pins 1, 5, 6, and 10 N-Channel MOSFET Ordering Information: SiE818DF-T1-E3 (Lead (Pb)-free) For Related Documents SiE818DF-T1-GE3 (Lead (Pb)-free and Halogen-free) www.vishay.com/ppg 74337 ABSOLUTE MAXIMUM RATINGS T = 25 C, unless otherwise noted A Parameter Symbol Limit Unit Drain-Source Voltage V 75 DS V V Gate-Source Voltage 20 GS 79 (Silicon Limit) T = 25 C C a 60 (Package Limit) a Continuous Drain Current (T = 150 C) I T = 70 C J D 60 C b, c T = 25 C 16 A b, c T = 70 C A 12.9 A Pulsed Drain Current I 80 DM a T = 25 C 60 C Continuous Source-Drain Diode Current I S b, c T = 25 C 4.3 A Single Pulse Avalanche Current I 50 AS L = 0.1 mH E Avalanche Energy 125 mJ AS T = 25 C 125 C T = 70 C 80 C P Maximum Power Dissipation W D b, c T = 25 C 5.2 A b, c T = 70 C 3.3 A T , T - 55 to 150 Operating Junction and Storage Temperature Range J stg C d, e 260 Soldering Recommendations (Peak Temperature) Notes: a. Package limited. b. Surface Mounted on 1 x 1 FR4 board. c. t = 10 s. d. See Solder Profile (www.vishay.com/doc 73257). The PolarPAK is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. Document Number: 74485 www.vishay.com S09-1338-Rev. B, 13-Jul-09 1SiE818DF Vishay Siliconix THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit a, b R t 10 s 20 24 Maximum Junction-to-Ambient thJA R (Drain) Maximum Junction-to-Case (Drain Top) 0.8 1 C/W thJC Steady State a, c R (Source) 2.2 2.7 Maximum Junction-to-Case (Source) thJC Notes: a. Surface Mounted on 1 x 1 FR4 board. b. Maximum under Steady State conditions is 68 C/W. c. Measured at source pin (on the side of the package). SPECIFICATIONS T = 25 C, unless otherwise noted J Parameter Symbol Test Conditions Min.Typ.Max.Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 A 75 V DS GS D V Temperature Coefficient V /T 78 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 7.1 GS(th) GS(th) J V Gate-Source Threshold Voltage V = V , I = 250 A 1.5 2.1 3 V GS(th) DS GS D I Gate-Source Leakage V = 0 V, V = 20 V 100 nA GSS DS GS V = 75 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 75 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 25 A D(on) On-State Drain Current DS GS V = 10 V, I = 16 A 0.0078 0.0095 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 14 A 0.0103 0.0125 GS D a g V = 20 V, I = 16 A 50 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 3200 iss C V = 38 V, V = 0 V, f = 1 MHz Output Capacitance 330 pF oss DS GS C Reverse Transfer Capacitance 170 rss V = 38 V, V = 10 V, I = 16 A 63 95 DS GS D Q Total Gate Charge g 33 50 nC Gate-Source Charge Q V = 38 V, V = 4.5 V, I = 16 A 11 gs DS GS D Q Gate-Drain Charge 17 gd R Gate Resistance f = 1 MHz 0.95 1.5 g t Turn-On Delay Time 30 45 d(on) t Rise Time V = 38 V, R = 3.8 150 225 r DD L t I 10 A, V = 4.5 V, R = 1 Turn-Off Delay Time 40 60 d(off) D GEN g t Fall Time 15 25 f t Turn-On Delay Time 15 25 d(on) ns t V = 38 V, R = 3.8 Rise Time 15 25 r DD L t I 10 A, V = 10 V, R = 1 Turn-Off Delay Time 40 60 d(off) D GEN g t Fall Time 10 15 f Drain-Source Body Diode Characteristics I Continuous Source-Drain Diode Current T = 25 C 60 S C A a I 80 Pulse Diode Forward Current SM V Body Diode Voltage I = 10 A 0.8 1.2 V SD S t Body Diode Reverse Recovery Time 100 150 ns rr Q Body Diode Reverse Recovery Charge 345 520 nC rr I = 10 A, dI/dt = 100 A/s, T = 25 C F J t Reverse Recovery Fall Time 75 a ns t Reverse Recovery Rise Time 25 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 % b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com Document Number: 74485 2 S09-1338-Rev. B, 13-Jul-09