VS-VSKS500/08PbF www.vishay.com Vishay Semiconductors Single Thyristor (MAGN-A-PAK Block Power Module), 500 A FEATURES Electrically isolated base plate 3000 V isolating voltage RMS Industrial standard package Simplified mechanical designs, rapid assembly High surge capability Large creepage distances UL approved file E78996 MAGN-A-PAK Block Material categorization: for definitions of compliance please see www.vishay.com/doc 99912 APPLICATIONS PRIMARY CHARACTERISTICS Battery chargers I 500 A T(AV) Type Modules - thyristor, standard Welders Package MAGN-A-PAK block Power converters Alternators MAJOR RATINGS AND CHARACTERISTICS SYMBOL CHARACTERISTICS VALUES UNITS V /V 800 V DRM RRM I 76 C 500 T(AV) I 785 T(RMS) A 50 Hz 14 000 I TSM 60 Hz 14 658 50 Hz 980 2 2 I t kA s 60 Hz 894 2 2 I t 9800 kA s T Range -40 to +130 C J ELECTRICAL SPECIFICATIONS VOLTAGE RATINGS V /V , MAXIMUM V /V , MAXIMUM RRM DRM RSM DSM I /I RRM DRM REPETITIVE PEAK NON-REPETITIVE PEAK TYPE NUMBER AT 130 C REVERSE VOLTAGE REVERSE VOLTAGE mA V V VS-VSKS500/08PbF 800 900 80 Revision: 26-Jul-2018 Document Number: 93160 1 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000VS-VSKS500/08PbF www.vishay.com Vishay Semiconductors ON-STATE CONDUCTION PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS 500 A Maximum average on-state current I 180 conduction half sine wave T(AV) at case temperature 76 C Maximum RMS on-state current I As AC switch 785 T(RMS) t = 10 ms 16 646 No voltage reapplied Maximum peak, one-cycle t = 8.3 ms 17 430 A on-state, non-repetitive I TSM t = 10 ms 14 000 surge current 100 % V RRM reapplied t = 8.3 ms 14 658 Sine half wave, initial T = T maximum J J t = 10 ms 1385 No voltage reapplied t = 8.3 ms 1265 2 2 2 Maximum I t for fusing I t kA s t = 10 ms 894 100 % V RRM reapplied t = 8.3 ms 894 2 2 2 Maximum I t for fusing I t t = 0.1 ms to 10 ms, no voltage reapplied 1385 kA s Low level value of threshold voltage V (16.7 % x x I < I < x I ), T maximum 0.6839 T(TO)1 T(AV) T(AV) J V High level value of threshold voltage V (I > x I ), T maximum 0.7598 T(TO)2 T(AV) J Low level value on-state r (16.7 % x x I < I < x I ), T maximum 0.393 t1 T(AV) T(AV) J slope resistance m High level value on-state r (I > x I ), T maximum 0.389 t2 T(AV) J slope resistance Maximum on-state voltage drop V T = 25 C, I = 500 A 1.1 V TM J pk SWITCHING PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Gate current 1 A, dI /dt = 1 A/s, g Typical delay time t 1.3 d V = 0.67 % V , T = 25 C, I = 400 A d DRM J t s I = 750 A, T = T maximum, dI/dt = 60 A/s, V = 50 V, TM J J R Typical turn-off time t 200 q dV/dt = 20 V/s, Gate 0 V 100 , t = 500 s p BLOCKING PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS Maximum critical rate of rise of dV/dt T = T maximum linear to 67 % rated V 500 V/s J J DRM off-state voltage Maximum peak reverse and off-state I , DRM T = T maximum, rated V /V applied 80 mA J J DRM RRM leakage current I RRM RMS insulation voltage V 50 Hz, circuit to base, all terminal shorted, t = 1 s 3000 V INS Revision: 26-Jul-2018 Document Number: 93160 2 For technical questions within your region: DiodesAmericas vishay.com, DiodesAsia vishay.com, DiodesEurope vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000