AS1C512K16P-70BIN Alliance Memory

AS1C512K16P-70BIN Revision History 512 Kb x16 Pseudo Static RAM 48ball-FPBGA Revision Details Date Rev 1.0 Preliminary datasheet Aug. 2018 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 12 - Rev.1.0 Aug. 2018AS1C512K16P-70BIN GENERAL DESCRIPTION The AS1C512K16P-70BIN is 8,388,608 bits of Pseudo SRAM which uses DRAM type memory cells, but this device has refresh-free operation and extreme low power consumption technology. Furthermore the interface is compatible to a low power Asynchronous type SRAM. The AS1C512K16P-70BIN is organized as 524,288 Words x 16 bit. FEATURES - Organization :512K x16 - Address access speed 70ns - Power Supply Voltage : 2.6 ~ 3.3V - Separated I/O power(VccQ) & Core power(Vcc) - Three state outputs - Byte read/write control by UB / LB - Auto-TCSR for power saving - Package type : 48-FPBGA 6.0x7.0 - Operating Temperature . Industrial : -40 ~ 85 PRODUCT FAMILY Power Dissipation Operating I ( Max.) Operating Speed CC Part Number Power Supply (t ) Standby Temp. RC I I CC1 CC2 (I , Max.) SB ( f = 1MHz) ( f = f ) max AS1C512K16P-70BIN -40 to 85 2.6V to 3.3V 70ns 120uA 5mA 25mA FUNCTION BLOCK DIAGRAM Self-Refresh CS CONTROL COLUMN SELECT UB CONTROL LB LOGIC WE OE Memory Array ADDRESS A0~A18 512K X 16 DECODER DQ0~ Din/Dout BUFFER DQ15 I/O CIRCUIT Confidential - 2 of 12 - Rev.1.0 Aug. 2018 ROW SELECT