Data Sheet BCM53262M Managed Switch with 24 FE Ports + 4-GbE Interface GENERAL DESCRIPTION FEATURES The BCM53262M is a ninth-generation RoboSwitch Ninth-generation L2+ Fast Ethernet switch with four design based on the field-proven BCM5324 device. This SGMII interfaces. integrated 0.13-CMOS device combines all the 24-port 10/100 transceivers for TX/EFX. functions of a high-speed switch system including Advanced Cable Diagnostic support. packet buffers, PHY transceivers, Media Access 25 10/100 MACs. Controllers (MACs), address management, and a Four Gigabit MACs. nonblocking switch fabric. It is designed to be fully 3-Mbit (384 KB) packet buffer and control memory. compliant with the IEEE 802.3 and IEEE 802.3x Management Port with RvMII/MII interface (Rev. A). specifications, including the MAC control PAUSE frame, Management Port with RvMII/MII/GMII interface auto-negotiation and with all industry-standard (Rev. B). Ethernet and Fast Ethernet devices. Nonblocking switch fabric for 24 FE + 4 GbE ports. Jumbo frame support up to 2048 bytes. The BCM53262M contains 24 full-duplex 10Base-T/ Flexible TCAM-based Compact Field Processor for 100Base-TX Fast Ethernet transceivers with Advanced packet classification and filtering. Cable Diagnostics support. Each performs all physical Packet Remarking, VID Replacement. layer interface functions for 10Base-T Ethernet on 802.1p PCP, DSCP remarking. Category 3, 4, or 5 Unshielded Twisted Pair (UTP) cable Optimized for managed switch design. and 100Base-TX Fast Ethernet on Category 5 UTP cable. 802.1p, Port, MAC, Protocol, Customer VID, and The BCM53262M has four SGMII interfaces that provide DiffServ (IPv4/IPv6) based QoS packet classification with flexible 10/100/1000Base-TX/FX connectivity. An four priority queues. additional MAC is included for CPU connection via Port-based VLAN. RvMII/MII (Rev. A)/GMII (Rev. B) interface. 802.1Q-based VLAN with 4K entries. The BCM53262M has a rich feature set suitable for MAC-based VLAN with 512 entries. streaming VoIP, video, and data traffic for multimedia Protocol-based VLAN with 16 entries. applications. The BCM53262M supports up to four QoS VLAN Translation. queues per port. Traffic QoS can be assigned based on Double tagging. Port-ID, MAC Address, 802.1p or DiffServ. Together with UNI/NNI configuration per port for edge access 4K entries, 802.1Q VLAN, 802.1x EAPOL protocol application. filtering, MAC-based link aggregation with dynamic QinQ packet transmission through NNI port. failover, per-port bandwidth/rate control, MAC address Programmable global SP TPID. locking, and IGMP snooping at Layer 3 allow system Programmable SP VID through flexible mapping. vendors to build advanced L2+ switch systems for the Link Aggregation support with automatic link fail-over. Multitenant/Multidweller Unit (MTU/MDU) Programmable per-port Bandwidth/Rate control. markets.The BCM53262M provides 70+ on-chip MIB Protected port security feature. counters to collect receive and transmit statistics for Port mirroring (Ingress/Egress), IGMP Layer 3. snooping each port. and MLD snooping. Spanning Tree support (802.1d/1s/1w). Supports 802.1x EAPOL higher layer protocol. Programmable Broadcast, Multicast, and Unknown Unicast storm control.8K MAC addresses with automatic learning and aging. MDC/MDIO and SPI interfaces. 4K-entry Multicast Address table. Hardware supports SNMP, RMON. Internal oscillator simplifies design and reduces cost. JTAG. 2.5V and 1.2V, typical power consumption: ~ 4.3W. 676-pin PBGA package. 53262M-DS302-R 5300 California Avenue Irvine, CA 92617 Phone: 949-926-5000 Fax: 949-926-5203 July 28, 2011 Broadcom ConfidentialBCM53262M Data Sheet Revision History MIB Snapshot QoS a 10/100 PHY MAC Auto MDI/MDIX (Ports 24~31) (24-31) a 8K L2 MAC Traffic 10/100 PHY MAC Auto MDI/MDIX (Ports 32~39) (32-39) Table Aggregation a 10/100 PHY MAC Auto MDI/MDIX (Ports 40~47) (40-47) 4K VLAN Port Trunking GMII (Rev. B)/ Table GMAC/MAC MII/RvMII (48) IGMP 802.1X GMAC (49) Snooping Secure MAC SerDes SGMII GMAC (50) X 4 Interface GMAC (51) GMAC (52) 4-Mb Shared Storm IntLEDerfac e Buffer Control LED LEDs Interface ContentAware Rate SPI/EB Compact Field CPU Interface Control Interface Processor EEPROM 93Cx6 Interface Double TCAM Tagging a Broadcom SDK maps these ports to logical ports 0, 1, and 23 respectively Figure 1: Functional Block Diagram BROADCOM July 28, 2011 53262M-DS302-R Page 2 Broadcom Confidential