CY62128E MoBL
1-Mbit (128 K 8) Static RAM
1-Mbit (128 K 8) Static RAM
Features Functional Description
Very high speed: 45 ns The CY62128E is a high performance CMOS static RAM
organized as 128K words by 8 bits. This device features
Temperature ranges
advanced circuit design to provide ultra low active current. This
Industrial: 40 C to +85 C
is ideal for providing More Battery Life (MoBL ) in portable
Automotive-A: 40 C to +85 C
applications. The device also has an automatic power down
Automotive-E: 40 C to +125 C feature that significantly reduces power consumption when
addresses are not toggling. Placing the device into standby
Voltage range: 4.5 V to 5.5 V
mode reduces power consumption by more than 99 percent
when deselected (CE HIGH or CE LOW). The eight input and
Pin compatible with CY62128B
1 2
output pins (I/O through I/O ) are placed in a high impedance
0 7
Ultra low standby power
state when the device is deselected (CE HIGH or CE LOW),
1 2
Typical standby current: 1 A
the outputs are disabled (OE HIGH), or a write operation is in
Maximum standby current: 4 A (Industrial) progress (CE LOW and CE HIGH and WE LOW).
1 2
To write to the device, take Chip Enable (CE LOW and CE
Ultra low active power
1 2
HIGH) and Write Enable (WE) inputs LOW. Data on the eight I/O
Typical active current: 1.3 mA at f = 1 MHz
pins (I/O through I/O ) is then written into the location specified
0 7
Easy memory expansion with CE , CE and OE features
1 2, on the address pins (A through A ).
0 16
Automatic power down when deselected To read from the device, take Chip Enable (CE LOW and CE
1 2
HIGH) and Output Enable (OE) LOW while forcing Write Enable
complementary metal oxide semiconductor (CMOS) for
(WE) HIGH. Under these conditions, the contents of the memory
optimum speed and power
location specified by the address pins appear on the I/O pins.
Offered in standard Pb-free 32-pin STSOP, 32-pin SOIC, and
The CY62128E device is suitable for interfacing with processors
32-pin thin small outline package (TSOP) Type I packages
that have TTL I/P levels. It is not suitable for processors that
require CMOS I/P levels. Please see Electrical Characteristics
on page 5 for more details and suggested alternatives.
Logic Block Diagram
I/O
INPUT BUFFER I/O0
0
A
0
I/O
A I/O1
1 1
A
2
A I/O
I/O
3 2
2
A
4
A 128K x 8 I/O
I/O
5 3
3
A
6
A ARRAY I/OI/O
7 44
A
8
A I/O
I/O
9 55
A
10
A
I/O
11 I/O
6
6
CE
1
I/O
CE POWER
I/O7
2
COLUMN DECODER 7
WE DOWN
OE
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 38-05485 Rev. *M Revised August 19, 2014
ROW DECODER
A
12
A
13
A
14
A
15
A
16
SENSE AMPS
CY62128E MoBL
Contents
Pin Configuration .............................................................3 Ordering Information ...................................................... 13
Product Portfolio ..............................................................4 Ordering Code Definitions ......................................... 13
Maximum Ratings .............................................................5 Package Diagrams .......................................................... 14
Operating Range ...............................................................5 Acronyms ........................................................................17
Electrical Characteristics .................................................5 Document Conventions ................................................. 17
Capacitance ......................................................................6 Units of Measure ....................................................... 17
Thermal Resistance ..........................................................6 Document History Page ................................................. 18
AC Test Loads and Waveforms .......................................6 Sales, Solutions, and Legal Information ...................... 20
Data Retention Characteristics .......................................7 Worldwide Sales and Design Support ....................... 20
Data Retention Waveform ................................................7 Products ....................................................................20
Switching Characteristics ................................................8 PSoC Solutions ...................................................... 20
Switching Waveforms ......................................................9 Cypress Developer Community ................................. 20
Truth Table ......................................................................12 Technical Support ..................................................... 20
Document Number: 38-05485 Rev. *M Page 2 of 20