CY14B101KA CY14B101MA 1-Mbit (128K 8/64K 16) nvSRAM with Real Time Clock 1-Mbit (128K 8/64K 16) nvSRAM with Real Time Clock Industry standard configurations Features Single 3 V +20%, 10% operation 1-Mbit nonvolatile static random access memory (nvSRAM) Industrial temperature 25 ns and 45 ns access times Packages Internally organized as 128K 8 (CY14B101KA) or 64K 16 (CY14B101MA) 44-/54-pin thin small outline package (TSOP) Type II Hands off automatic STORE on power-down with only a small 48-pin shrink small outline package (SSOP) capacitor Pb-free and restriction of hazardous substances (RoHS) STORE to QuantumTrap nonvolatile elements is initiated by compliant software, hardware, or AutoStore on power-down RECALL to SRAM initiated on power-up or by software Functional Description High reliability The Cypress CY14B101KA/CY14B101MA combines a 1-Mbit Infinite Read, Write, and RECALL cycles nvSRAM with a full featured real time clock in a monolithic 1 million STORE cycles to QuantumTrap integrated circuit. The embedded nonvolatile elements 20 year data retention incorporate QuantumTrap technology producing the worlds Real time clock (RTC) most reliable nonvolatile memory. The SRAM is read and written an infinite number of times, while independent nonvolatile data Full featured real time clock resides in the nonvolatile elements. Watchdog timer Clock alarm with programmable interrupts The real time clock function provides an accurate clock with leap Capacitor or battery backup for RTC year tracking and a programmable, high accuracy oscillator. The Backup current of 0.35 A (Typ) alarm function is programmable for periodic minutes, hours, days, or months alarms. There is also a programmable watchdog timer for process control. For a complete list of related documentation, click here. 1, 2, 3 Logic Block Diagram V CA V Quatrum CC P Trap 1024 X 1024 V POWER RTCbat A R 5 CONTROL STORE V O A RTCcap 6 W A RECALL 7 A STORE/RECALL 8 D HSB A CONTROL 9 E STATIC RAM A 12 C ARRAY A 13 O 1024 X 1024 SOFTWARE A D 14 A - A 14 2 A E DETECT 15 A R 16 DQ 0 DQ 1 DQ 2 X out DQ 3 RTC X in DQ I 4 INT N DQ 5 P DQ U 6 T DQ 7 B COLUMN I/O U MUX A - A DQ 16 0 8 F DQ F 9 E OE DQ 10 R COLUMN DEC WE DQ S 11 DQ 12 DQ 13 CE DQ 14 BLE A A A A A A A 0 1 2 3 4 10 11 DQ 15 BHE Notes 1. Address A A for 8 configuration and Address A A for 16 configuration. 0 16 0 15 2. Data DQ DQ for 8 configuration and Data DQ DQ for 16 configuration. 0 7 0 15 3. BHE and BLE are applicable for 16 configuration only. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-42880 Rev. *P Revised December 6, 2017CY14B101KA CY14B101MA Contents Pinouts ..............................................................................3 Data Retention and Endurance ..................................... 19 Pin Definitions ..................................................................4 Capacitance ....................................................................19 Device Operation ..............................................................5 Thermal Resistance ........................................................ 19 SRAM Read ................................................................5 AC Test Loads ................................................................ 20 SRAM Write .................................................................5 AC Test Conditions ........................................................ 20 AutoStore Operation ....................................................5 RTC Characteristics ....................................................... 20 Hardware STORE (HSB) Operation ............................5 AC Switching Characteristics ....................................... 21 Hardware RECALL (Power-Up) ..................................6 SRAM Read Cycle .................................................... 21 Software STORE .........................................................6 SRAM Write Cycle ..................................................... 21 Software RECALL .......................................................6 Switching Waveforms .................................................... 22 Preventing AutoStore ..................................................8 AutoStore/Power-Up RECALL ....................................... 25 Data Protection ............................................................8 Switching Waveforms .................................................... 25 Real Time Clock Operation ..............................................8 Software Controlled STORE/RECALL Cycle ................ 26 nvTIME Operation .......................................................8 Switching Waveforms .................................................... 26 Clock Operations .........................................................8 Hardware STORE Cycle ................................................. 27 Reading the Clock .......................................................8 Switching Waveforms .................................................... 27 Setting the Clock .........................................................8 Truth Table for SRAM Operations ................................. 28 Backup Power .............................................................8 Truth Table for SRAM Operations ................................. 28 Stopping and Starting the Oscillator ............................9 HSB must remain HIGH for SRAM operations........... 28 Calibrating the Clock ...................................................9 Ordering Information ...................................................... 29 Alarm ...........................................................................9 Package Diagrams .......................................................... 30 Watchdog Timer ........................................................10 Acronyms ........................................................................33 Power Monitor ...........................................................10 Document Conventions ................................................. 33 Interrupts ...................................................................10 Units of Measure ....................................................... 33 Flags Register ...........................................................11 Document History Page ................................................. 34 RTC External Components .......................................12 Sales, Solutions, and Legal Information ...................... 37 PCB Design Considerations for RTC ............................13 Worldwide Sales and Design Support ....................... 37 Layout requirements ..................................................13 Products ....................................................................37 Maximum Ratings ...........................................................18 PSoC Solutions ...................................................... 37 Operating Range .............................................................18 Cypress Developer Community ................................. 37 DC Electrical Characteristics ........................................18 Technical Support ..................................................... 37 Document Number: 001-42880 Rev. *P Page 2 of 37