CY62136ESL MoBL 2-Mbit (128 K 16) Static RAM 2-Mbit (128 K 16) Static RAM not toggling. Placing the device into standby mode reduces Features power consumption by more than 99% when deselected (CE HIGH). The input and output pins (I/O through I/O ) are placed Very high speed: 45 ns 0 15 in a high impedance state when the device is deselected (CE Wide voltage range: 2.2 V to 3.6 V and 4.5 V to 5.5 V HIGH), the outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH) or Ultra low standby power during a write operation (CE LOW and WE LOW). Typical standby current: 1 A To write to the device, take Chip Enable (CE) and Write Enable Maximum standby current: 7 A (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data Ultra low active power from I/O pins (I/O through I/O ) is written into the location 0 7 Typical active current: 2 mA at f = 1 MHz specified on the address pins (A through A ). If Byte High 0 16 Enable (BHE) is LOW, then data from I/O pins (I/O through 8 Easy memory expansion with CE and OE features I/O ) is written into the location specified on the address pins 15 Automatic power-down when deselected (A through A ). 0 16 To read from the device, take Chip Enable (CE) and Output Complementary metal oxide semiconductor (CMOS) for Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If optimum speed and power Byte Low Enable (BLE) is LOW, then data from the memory Available in Pb-free 44-pin thin small outline package (TSOP) II location specified by the address pins appears on I/O to I/O . If 0 7 package Byte High Enable (BHE) is LOW, then data from memory appears on I/O to I/O . See the Truth Table on page 11 for a 8 15 Functional Description complete description of read and write modes. The device is suitable for interfacing with processors that have The CY62136ESL is a high performance CMOS static RAM TTL I/P levels. It is not suitable for processors that require CMOS organized as 128K words by 16 bits. This device features I/P levels. Please see Electrical Characteristics on page 4 for advanced circuit design to provide ultra low active current. This more details and suggested alternatives. is ideal for providing More Battery Life (MoBL ) in portable applications. The device also has an automatic power down For a complete list of related documentation, click here. feature that reduces power consumption when addresses are Logic Block Diagram DATA IN DRIVERS A 10 A 9 A 8 A 7 A 6 A 128 K x 16 5 A 4 RAM Array I/O I/O 0 7 A 3 I/O I/O A 8 15 2 A 1 A 0 COLUMN DECODER BHE WE CE OE BLE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-48147 Rev. *L Revised November 29, 2017 ROW DECODER A 11 A 12 A 13 A 14 A 15 A 16 SENSE AMPS CY62136ESL MoBL Contents Pin Configuration .............................................................3 Ordering Information ...................................................... 12 Product Portfolio ..............................................................3 Ordering Code Definitions ......................................... 12 Maximum Ratings .............................................................4 Package Diagram ............................................................ 13 Operating Range ...............................................................4 Acronyms ........................................................................14 Electrical Characteristics .................................................4 Document Conventions ................................................. 14 Capacitance ......................................................................5 Units of Measure ....................................................... 14 Thermal Resistance ..........................................................5 Document History Page ................................................. 15 AC Test Loads and Waveforms .......................................5 Sales, Solutions, and Legal Information ...................... 17 Data Retention Characteristics .......................................6 Worldwide Sales and Design Support ....................... 17 Data Retention Waveform ................................................6 Products ....................................................................17 Switching Characteristics ................................................7 PSoC Solutions ...................................................... 17 Switching Waveforms ......................................................8 Cypress Developer Community ................................. 17 Truth Table ......................................................................11 Technical Support ..................................................... 17 Document Number: 001-48147 Rev. *L Page 2 of 17