CY62137FV18 MoBL 2-Mbit (128 K 16) Static RAM 2-Mbit (128 K 16) Static RAM applications such as cellular telephones. The device also has an Features automatic power down feature that significantly reduces power Very high speed: 55 ns consumption when addresses are not toggling. Placing the device into standby mode reduces power consumption by more Wide voltage range: 1.65 V to 2.25 V than 99% when deselected (CE HIGH or both BLE and BHE are Pin compatible with CY62137CV18 HIGH). The input and output pins (I/O through I/O ) are placed 0 15 in a high impedance state when the device is deselected (CE Ultra low standby power HIGH), the outputs are disabled (OE HIGH), both the Byte High Typical standby current: 1 A Enable and the Byte Low Enable are disabled (BHE, BLE HIGH), Maximum standby current: 5 A or during an active write operation (CE LOW and WE LOW). Ultra low active power To write to the device, take Chip Enable (CE) and Write Enable Typical active current: 1.6 mA f = 1 MHz (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data Easy memory expansion with CE and OE features from I/O pins (I/O through I/O ) is written into the location 0 7 specified on the address pins (A through A ). If Byte High 0 16 Automatic power down when deselected Enable (BHE) is LOW, then data from I/O pins (I/O through 8 Complementary metal oxide semiconductor (CMOS) for I/O ) is written into the location specified on the address pins 15 optimum speed and power (A through A ). 0 16 Byte power-down feature To read from the device, take Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Available in a Pb-free 48-ball Very fine-pitch ball grid package Byte Low Enable (BLE) is LOW, then data from the memory (VFBGA) package location specified by the address pins appear on I/O to I/O . If 0 7 Byte High Enable (BHE) is LOW, then data from the memory Functional Description appears on I/O to I/O . See the Truth Table on page 11 for a 8 15 The CY62137FV18 is a high performance CMOS static RAM complete description of read and write modes. organized as 128K words by 16 bits. This device features For a complete list of related documentation, click here. advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life (MoBL ) in portable Logic Block Diagram DATA IN DRIVERS A 10 A 9 A 8 A 7 A 128K x 16 6 A 5 I/O I/O RAM Array 0 7 A 4 A 3 I/O I/O 8 15 A 2 A 1 A 0 COLUMN DECODER BHE WE CE POWER DOWN CE CIRCUIT BHE OE BLE BLE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-08030 Rev. *M Revised November 29, 2017 ROW DECODER A 11 A 12 A 13 A 14 A 15 A 16 SENSE AMPS CY62137FV18 MoBL Contents Product Portfolio ..............................................................3 Ordering Information ...................................................... 12 Pin Configuration .............................................................3 Ordering Code Definitions ......................................... 12 Maximum Ratings .............................................................4 Package Diagram ............................................................ 13 Operating Range ...............................................................4 Acronyms ........................................................................14 Electrical Characteristics .................................................4 Document Conventions ................................................. 14 Capacitance ......................................................................5 Units of Measure ....................................................... 14 Thermal Resistance ..........................................................5 Document History Page ................................................. 15 AC Test Loads and Waveforms .......................................5 Sales, Solutions, and Legal Information ...................... 16 Data Retention Characteristics .......................................6 Worldwide Sales and Design Support ....................... 16 Data Retention Waveform ................................................6 Products ....................................................................16 Switching Characteristics ................................................7 PSoC Solutions ...................................................... 16 Switching Waveforms ......................................................8 Cypress Developer Community ................................. 16 Truth Table ......................................................................11 Technical Support ..................................................... 16 Document Number: 001-08030 Rev. *M Page 2 of 16