Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comCY62157EV18 MoBL 8-Mbit (512K 16) Static RAM 8-bit (512K x 16) Static RAM consumption when addresses are not toggling. The device can Features also be put into standby mode when deselected (CE HIGH or 1 CE LOW or both BHE and BLE are HIGH). The input and output Very high speed: 55 ns 2 pins (I/O through I/O ) are placed in a high impedance state 0 15 Wide voltage range: 1.65 V2.25 V when: Pin compatible with CY62157DV18 and CY62157DV20 Deselected (CE HIGH or CE LOW) 1 2 Ultra low standby power Outputs are disabled (OE HIGH) Typical Standby current: 2 A Both Byte High Enable and Byte Low Enable are disabled Maximum Standby current: 8 A (BHE, BLE HIGH) or Ultra low active power Write operation is active (CE LOW, CE HIGH and WE LOW). 1 2 Typical active current: 6 mA at f = 1 MHz Write to the device by taking Chip Enables (CE LOW and CE 1 2 Easy memory expansion with CE , CE and OE features 1 2 HIGH) and Write Enable (WE) input LOW. If Byte Low Enable Automatic power down when deselected (BLE) is LOW, then data from I/O pins (I/O through I/O ), is 0 7 written into the location specified on the address pins (A through 0 Complementary metal oxide semiconductor (CMOS) for A ). If Byte High Enable (BHE) is LOW, then data from I/O pins optimum speed and power 18 (I/O through I/O ) is written into the location specified on the 8 15 Available in Pb-free 48-ball very fine-pitch ball grid array address pins (A through A ). 0 18 (VFBGA) package Read from the device by taking Chip Enables (CE LOW and 1 Functional Description CE HIGH) and Output Enable (OE) LOW while forcing the Write 2 Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data The CY62157EV18 is a high performance CMOS static RAM from the memory location specified by the address pins appear organized as 512K words by 16 bits. This device features on I/O to I/O . If Byte High Enable (BHE) is LOW, then data from 0 7 advanced circuit design to provide ultra low active current. This memory appears on I/O to I/O . See the Truth Table on page 8 15 is ideal for providing More Battery Life (MoBL ) in portable 13 for a complete description of read and write modes. applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power For a complete list of related documentation, click here. Product Portfolio Power Dissipation Operating I , (mA) V Range (V) CC CC Speed Standby, I ( A) Product SB2 (ns) f = 1MHz f = f max 1 1 1 1 Min Max Max Max Max Typ Typ Typ Typ CY62157EV18 1.65 1.8 2.25 55 6 7 18 25 2 8 Note 1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V = V , T = 25 C. CC CC(typ) A Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-05490 Rev. *M Revised February 28, 2020