Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comCY62167EV30 Industrial MoBL 16-Mbit (1M 16/2M 8) Static RAM 16-Mbit (1M 16/2M 8) Static RAM Features Functional Description TSOP I package configurable as 1M 16 or 2M 8 SRAM The CY62167EV30 is a high-performance CMOS static RAM organized as 1M words by 16 bits or 2M words by 8 bits. This Very high speed: 45 ns device features an advanced circuit design that provides an ultra Temperature ranges low active current. Ultra low active current is ideal for providing More Battery Life (MoBL ) in portable applications such as Industrial: 40 C to +85 C cellular telephones. The device also has an automatic power Wide voltage range: 2.20 V to 3.60 V down feature that reduces power consumption by 99 percent when addresses are not toggling. Place the device in standby Ultra-low standby power mode when deselected (CE HIGH or CE LOW or both BHE and 1 2 Typical standby current: 1.5 A BLE are HIGH). The input and output pins (I/O through I/O ) 0 15 Maximum standby current: 12 A are placed in a high-impedance state when: the device is deselected (CE HIGH or CE LOW), outputs are disabled (OE Ultra-low active power 1 2 HIGH), both Byte High Enable and Byte Low Enable are disabled Typical active current: 7 mA at f = 1 MHz (BHE, BLE HIGH), or a write operation is in progress (CE LOW, 1 Easy memory expansion with CE , CE , and OE Features CE HIGH and WE LOW). 1 2 2 To write to the device, take Chip Enables (CE LOW and CE Automatic power-down when deselected 1 2 HIGH) and Write Enable (WE) input LOW. If Byte Low Enable CMOS for optimum speed and power (BLE) is LOW, then data from I/O pins (I/O through I/O ) is 0 7 written into the location specified on the address pins (A through 0 Offered in Pb-free 48-ball VFBGA and 48-pin TSOP I packages A ). If Byte High Enable (BHE) is LOW, then data from the I/O 19 pins (I/O through I/O ) is written into the location specified on 8 15 the address pins (A through A ). 0 19 To read from the device, take Chip Enables (CE LOW and CE 1 2 HIGH) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins appears on I/O to I/O . If Byte High Enable (BHE) is LOW, then data from 0 7 memory appears on I/O to I/O . See Truth Table on page 13 8 15 for a complete description of read and write modes. For a complete list of related documentation, click here. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-24706 Rev. *B Revised April 1, 2020