CY62167GN30 MoBL 16-Mbit (1M 16/2M 8) Static RAM 16-Mbit (1M 16/2M 8) Static RAM More Battery Life (MoBL ) in portable applications such as Features cellular telephones. The device also has an automatic power down feature that reduces power consumption by 99 percent Ultra-low standby power when addresses are not toggling. Place the device into standby Typical standby current: 1.5 A mode when deselected (CE HIGH or CE LOW or both BHE and 1 2 Maximum standby current: 8 A BLE are HIGH). The input and output pins (I/O through I/O ) 0 15 TSOP I package configurable as 1M 16 or 2M 8 SRAM are placed in a high impedance state when: the device is deselected (CE HIGH or CE LOW), outputs are disabled (OE 1 2 Very high speed: 45 ns HIGH), both Byte High Enable and Byte Low Enable are disabled Temperature ranges (BHE, BLE HIGH), or a write operation is in progress (CE LOW, 1 CE HIGH and WE LOW). Industrial: 40 C to +85 C 2 To write to the device, take Chip Enables (CE LOW and CE 1 2 Wide voltage range: 2.2 V to 3.6 V HIGH) and Write Enable (WE) input LOW. If Byte Low Enable Easy memory expansion with CE , CE , and OE Features (BLE) is LOW, then data from I/O pins (I/O through I/O ) is 1 2 0 7 written into the location specified on the address pins (A through 0 Automatic power-down when deselected A ). If Byte High Enable (BHE) is LOW, then data from the I/O 19 pins (I/O through I/O ) is written into the location specified on CMOS for optimum speed and power 8 15 the address pins (A through A ). 0 19 Offered in Pb-free 48-ball VFBGA and 48-pin TSOP I packages To read from the device, take Chip Enables (CE LOW and CE 1 2 HIGH) and Output Enable (OE) LOW while forcing the Write Functional Description Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins appears The CY62167GN30 is a high performance CMOS static RAM on I/O to I/O . If Byte High Enable (BHE) is LOW, then data from organized as 1M words by 16 bits or 2M words by 8 bits. This 0 7 memory appears on I/O to I/O . See Truth Table on page 12 device features an advanced circuit design that provides an ultra 8 15 for a complete description of read and write modes. low active current. Ultra low active current is ideal for providing Logic Block Diagram DATA IN DRIVERS A 10 A 9 A 8 A 7 A 1M 16/2M 8 6 A 5 RAM Array I/O I/O 0 7 A 4 A I/O I/O 3 8 15 A 2 A 1 A 0 COLUMN DECODER BYTE BHE CE 2 WE CE 2 CE 1 Power Down CE 1 OE Circuit BHE BLE BLE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-28515 Rev. *A Revised March 16, 2020 ROW DECODER A 11 A 12 A 13 A 14 A 15 A 16 A 17 A 18 A 19 SENSE AMPSCY62167GN30 MoBL Contents Pin Configuration .............................................................3 Ordering Information ...................................................... 13 Product Portfolio ..............................................................3 Ordering Code Definitions ......................................... 13 Maximum Ratings .............................................................4 Package Diagrams .......................................................... 14 Operating Range ...............................................................4 Acronyms ........................................................................ 16 Electrical Characteristics .................................................4 Document Conventions ................................................. 16 Capacitance ......................................................................5 Units of Measure ....................................................... 16 Thermal Resistance ..........................................................5 Document History Page ................................................. 17 AC Test Loads and Waveforms .......................................5 Sales, Solutions, and Legal Information ...................... 18 Data Retention Characteristics .......................................6 Worldwide Sales and Design Support ....................... 18 Data Retention Waveform ................................................6 Products .................................................................... 18 Switching Characteristics ................................................7 PSoC Solutions ...................................................... 18 Switching Waveforms ......................................................8 Cypress Developer Community ................................. 18 Truth Table ......................................................................12 Technical Support ..................................................... 18 Document Number: 002-28515 Rev. *A Page 2 of 18