CYPRESS Asynchronous sr AMs with on -chip Error -c orr Ecting c od E (Ecc ) PRODUCT OVERVIEW COMPLETE FREEDOM FROM SOFT-ERRORS ADVANTAGES Highest level of reliability: Soft-Error The latest generation Asynchronous SRAMs from Cypress make the best of an advanced Rate < 0.1FIT/Mbit process technology by integrating single-bit error correction capability and Embedded ECC to detect and correct all bit-interleaving techniques to mitigate the effects of soft errors. The result is a family of single-bit errors devices that provide best-in-class features and the highest levels of reliability. Bit-interleaving to avoid multi-bit upsets With the performance to serve a wide variety of industrial, communication, data Optional ERR pin to indicate the occurrence processing, medical, consumer and military applications, Cypresss latest technology Fast of single-bit error and MoBL SRAM devices are form-tfi -function compatible with existing Asynchronous Industry leading access time: 10ns SRAM devices based on older technology nodes. This allows customers to boost system (16-Mbit FAST) performance and reliability without investing on PCB re-design. Ultra-low standby current: 16uA (16-Mbit MoBL) SOFT-ERROR MITIGATION IN ASYNCHRONOUS SRAM Multiple configurations: x8, x16, and x32 Cypresss latest generation Asynchronous SRAM devices use (38,32) Hamming Code Multiple operating voltages: 1.8V, 3V, 5V for single-bit error detection and correction. A hardware ECC block performs all ECC- Available in industrial and automotive related functions in line, without user intervention and without affecting the access time temperature grades performance of the device. The single-bit error detection and correction capability Form-fit-function compatible with current is supplemented by a bit-interleaving scheme to prevent the occurrence of multi-bit generation ASYNC SRAM devices errors. Together, these features provide signicfi ant improvement in Soft Error Rate (SER) performance, resulting in FIT rates less than 0.1 FIT/Mbit. ENHANCED RELIABILITY WITH ERR PIN Over a period of time, multiple single event upsets (SEUs) may affect the same word, resulting in an accumulated multi-bit upset (two or more single-bit upsets in the same word). Such an event is highly improbable. But if it does occur, an accumulated multi-bit upset cannot be detected by the ECC logic, and the system may read incorrect data. To mitigate this problem, Cypresss latest generation Asynchronous SRAM devices include an optional error indication (ERR) pin. During read operation, the ERR pin signals detection and correction of a single-bit error at the accessed memory location. The system can use this information to recognize a single-bit error and write-back corrected data to the memory. www.cypress.com/go/AsyncSRAMPRODUCT OVERVIEW Internal Block Diagram of ASYNCHRONOUS SRAM with ECC 16-MBIT FAST ASYNCHRONOUS SRAM (2) Part Number Organization Voltage Speed Package Temperature Grade CY7C1069G 2M x 8 1.8V, 3V, 5V 10ns, 12ns,15ns, 17ns 54-TSOP II, 48-VFBGA Industrial, Automotive (1) CY7C1069GE 2M x 8 1.8V, 3V, 5V 10ns, 12ns,15ns, 17ns 54-TSOP II, 48-VFBGA Industrial, Automotive CY7C1061G 1M x 16 1.8V, 3V, 5V 10ns, 12ns,15ns, 17ns 48-TSOP I, 54-TSOP II, 48-VFBGA Industrial, Automotive (1) CY7C1061GE 1M x 16 1.8V, 3V, 5V 10ns, 12ns,15ns, 17ns 48-TSOP I, 54-TSOP II, 48-VFBGA Industrial, Automotive CY7C1062G 512K x 32 1.8V, 3V 10ns, 12ns, 15ns, 17ns 119-BGA Industrial, Automotive (1) CY7C1062GE 512K x 32 1.8V, 3V 10ns, 12ns, 15ns, 17ns 119-BGA Industrial, Automotive 16-MBIT MOBL ASYNCHRONOUS SRAM (4) Part Number Organization Voltage Speed Package Temperature Grade (3) CY62167G 1M x16 1.8V, 3V, 5V 45ns, 55ns 48-TSOP I, 48-VFBGA Industrial, Automotive (1) (3) CY62167GE 1M x16 1.8V, 3V, 5V 45ns, 55ns 48-TSOP I, 48-VFBGA Industrial, Automotive CY62168G 2M x 8 1.8V, 3V, 5V 45ns, 55ns 48-VFBGA Industrial, Automotive (1) CY62168GE 2M x 8 1.8V, 3V, 5V 45ns, 55ns 48-VFBGA Industrial, Automotive CY62162G 512K x 32 1.8V, 3V 45ns, 55ns 119-BGA Industrial, Automotive (1) CY62162GE 512K x 32 1.8V, 3V 45ns, 55ns 119-BGA Industrial, Automotive Notes: 1. Part with ERR pin 2. Operating speed is 10ns for Industrial Grade 3 V, 5 V part 15ns for Industrial Grade 1.8 V part 12ns for Automotive Grade 3 V, 5 V part and 17ns for Automotive Grade 1.8 V part 3. 48-pin TSOP I configurable as 1Mx16 or as 2Mx8 SRAM 4. Operating speed is 45ns for Industrial Grade and 55ns for Automotive Grade GET STARTED NOW For more information please visit us at www.cypress.com/go/AsyncSRAM Cypress Semiconductor Corporation 198 Champion Court, San Jose CA 95134 phone +1 408.943.2600 fax +1 408.943.6848 toll free +1 800.858.1810 (U.S. only) Press 1 to reach your local sales representative 2013 - 2014 Cypress Semiconductor Corporation. All rights reserved. All other trademarks are the property of their respective owners. Doc 001-86366 Rev.*B 052014/SHPT/TONE/BENY