X-On Electronics has gained recognition as a prominent supplier of CY62177EV18LL-70BAXI SRAM across the USA, India, Europe, Australia, and various other global locations. CY62177EV18LL-70BAXI SRAM are a product manufactured by Infineon. We provide cost-effective solutions for SRAM, ensuring timely deliveries around the world.

CY62177EV18LL-70BAXI Infineon

CY62177EV18LL-70BAXI electronic component of Infineon
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Part No.CY62177EV18LL-70BAXI
Manufacturer: Infineon
Category: SRAM
Description: SRAM Chip Async Single 1.8V 32M-bit 2M x 16 70ns 48-Pin FBGA Tray
Datasheet: CY62177EV18LL-70BAXI Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
1: USD 33.539 ea
Line Total: USD 33.54 
Availability - 417
Ship by Fri. 27 Dec to Tue. 31 Dec
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
417
Ship by Fri. 27 Dec to Tue. 31 Dec
MOQ : 1
Multiples : 1
1 : USD 33.539
10 : USD 32.032
25 : USD 30.778
50 : USD 30.778
100 : USD 30.778
210 : USD 28.402
1050 : USD 28.402

611
Ship by Tue. 31 Dec to Mon. 06 Jan
MOQ : 1
Multiples : 1
1 : USD 42.1578
10 : USD 40.1723
25 : USD 38.0943
50 : USD 37.9221
100 : USD 37.4456
210 : USD 34.322

   
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We are delighted to provide the CY62177EV18LL-70BAXI from our SRAM category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the CY62177EV18LL-70BAXI and other electronic components in the SRAM category and beyond.

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CY62177EV18 MoBL 32-Mbit (2 M 16 / 4 M 8) Static RAM 32-Mbit (2 M 16 / 4 M 8) Static RAM Features Functional Description Thin small outline package (TSOP) I configurable as 2 M 16 The CY62177EV18 is a high-performance CMOS static RAM or as 4 M 8 static RAM (SRAM) organized as 2 M words by 16 bits and 4 M words by 8 bits. This device features advanced circuit design to provide ultra low Very high speed active current. It is ideal for providing More Battery Life 70 ns (MoBL ) in portable applications, such as cellular telephones. The device also has an automatic power-down feature that Wide voltage range significantly reduces power consumption by 99 percent when 1.65 V to 2.25 V addresses are not toggling. The device can also be put into Ultra low standby power standby mode when deselected (CE HIGH or CE LOW or both 1 2 BHE and BLE are HIGH). The input and output pins (I/O through Typical standby current: 3 A 0 I/O ) are placed in a high impedance state when: deselected 15 Maximum standby current: 25 A (CE HIGH or CE LOW), outputs are disabled (OE HIGH), both 1 2 Ultra low active power Byte High Enable and Byte Low Enable are disabled (BHE, BLE Typical active current: 4.5 mA at f = 1 MHz HIGH), or during a write operation (CE LOW, CE HIGH and WE 1 2 LOW). Easy memory expansion with CE , CE and OE Features 1 2, To write to the device, take Chip Enables (CE LOW and CE 1 2 Automatic power-down when deselected HIGH) and Write Enable (WE) input LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O through I/O ), is 0 7 Complementary metal oxide semiconductor (CMOS) for written into the location specified on the address pins (A through 0 optimum speed and power A ). If Byte High Enable (BHE) is LOW, then data from I/O pins 20 Available in Pb-free 48-ball TSOP I and 48-ball FBGA package (I/O through I/O ) is written to the location specified on the 8 15 address pins (A through A ). To read from the device, take 0 20 Chip Enables (CE LOW and CE HIGH) and Output Enable 1 2 (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins appear on I/O to I/O . If Byte High 0 7 Enable (BHE) is LOW, then data from memory appears on I/O 8 to I/O . See the Truth Table on page 11 for a complete 15 description of read and write modes. Pin 13 of the 48 TSOP I package is an DNU pin that must be left floating at all times to ensure proper application. For a complete list of related documentation, click here. Logic Block Diagram DATA IN DRIVERS A 10 A 9 A 8 A 7 A 6 2M 16 A 5 I/O I/O RAM Array 0 7 A 4 A I/O I/O 3 8 15 A 2 A 1 A 0 COLUMN DECODER BYTE BHE WE CE 2 CE 1 OE BLE Power-Down CE Circuit BHE 2 CE BLE 1 Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-76091 Rev. *C Revised November 28, 2014 ROW DECODER A 11 A 12 A 13 A 14 A 15 A 16 A 17 A 18 A 19 A 20 SENSE AMPS CY62177EV18 MoBL Contents Pin Configuration .............................................................3 Ordering Information ...................................................... 12 Product Portfolio ..............................................................3 Ordering Code Definitions ......................................... 12 Maximum Ratings .............................................................4 Package Diagrams .......................................................... 13 Operating Range ...............................................................4 Acronyms ........................................................................15 Electrical Characteristics .................................................4 Document Conventions ................................................. 15 Capacitance ......................................................................5 Units of Measure ....................................................... 15 Thermal Resistance ..........................................................5 Document History Page ................................................. 16 AC Test Loads and Waveforms .......................................5 Sales, Solutions, and Legal Information ...................... 17 Data Retention Characteristics .......................................6 Worldwide Sales and Design Support ....................... 17 Data Retention Waveform ................................................6 Products ....................................................................17 Switching Characteristics ................................................7 PSoC Solutions ...................................................... 17 Switching Waveforms ......................................................8 Cypress Developer Community ................................. 17 Truth Table ......................................................................11 Technical Support ..................................................... 17 Document Number: 001-76091 Rev. *C Page 2 of 17

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
Cypress
Cypress / Spansion
CYPRESS SEMI
Cypress Semicon
Cypress Semiconductor
Cypress Semiconductor Corp
INF
INFINEON
Infineon IR
INFINEON (CYPRESS)
Infineon (IRF)
Infineon / Cypress
Infineon / IR
INFINEON TECH ICs
Infineon Technologies
INFINEON TECHNOLOGIES AG
Infineon Technologies Americas Corp.
Infinite Power Solutions
INTERNATIONAL RECTIF
INTERNATIONAL RECTIFIER
International Rectifier HiRel Products
INTL RECTIFIER
IR
IRH
Ramtron
Ramtron / Cypress Semiconductor
Ramtron International Corp
SP9
SPANSION
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