CY7C006A-20AXC Infineon

CY7C007A16K 8 Dual-Port Static RAM CY7C006A 16K 8 Dual-Port Static RAM 16K 8 Dual-Port Static RAM On-chip arbitration logic Features Semaphores included to permit software handshaking True dual-ported memory cells which allow simultaneous between ports access of the same memory location INT flags for port-to-port communication 16K 8 organization (CY7C006A) Pin select for Master or Slave 0.35-micron CMOS for optimum speed/power Commercial temperature range High-speed access: 20 ns Available in 68-pin PLCC (CY7C006A), 64-pin TQFP Low operating power (CY7C006A) Active: I = 180 mA (typical) CC Pb-free packages available Standby: I = 0.05 mA (typical) SB3 Fully asynchronous operation Functional Description Automatic power-down For a complete list of related documentation, click here. Expandable data bus to 16 bits or more using Master/Slave chip select when using more than one device Logic Block Diagram R/W R/W L R CE CE L R OE OE L R 8 8 I/O I/O I/O I/O 0L 7L 0R 7R I/O I/O Control Control 14 14 Address Address True Dual-Ported A A A A 0L 13L 0R 13R RAM Array Decode Decode 14 14 A A A A 0L 13L 0R 13R CE CE Interrupt L R OE OE Semaphore L R Arbitration R/W R/W L R SEM SEM L R 1 1 BUSY BUSY L R INT INT L R M/S Note 1. BUSY is an output in master mode and an input in slave mode. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-06045 Rev. *K Revised January 5, 2018CY7C006A Contents Pin Configurations ...........................................................3 Non-Contending Read/Write .......................................... 16 Selection Guide ................................................................4 Interrupt Operation Example ......................................... 16 Pin Definitions ..................................................................4 Semaphore Operation Example ....................................16 Architecture ......................................................................4 Ordering Information ...................................................... 17 Functional Overview ........................................................4 16K 8 Asynchronous Dual-Port SRAM .................. 17 Write Operation ...........................................................4 Ordering Code Definitions ......................................... 17 Read Operation ...........................................................5 Package Diagrams .......................................................... 18 Interrupts .....................................................................5 Acronyms ........................................................................ 20 Busy ............................................................................5 Document Conventions ................................................. 20 Master/Slave ...............................................................5 Units of Measure ....................................................... 20 Semaphore Operation .................................................5 Document History Page ................................................. 21 Maximum Ratings .............................................................6 Sales, Solutions, and Legal Information ...................... 22 Operating Range ...............................................................6 Worldwide Sales and Design Support ....................... 22 Electrical Characteristics .................................................6 Products .................................................................... 22 Capacitance ......................................................................7 PSoC Solutions ...................................................... 22 AC Test Loads and Waveforms .......................................7 Cypress Developer Community ................................. 22 Data Retention Mode ........................................................7 Technical Support ..................................................... 22 Timing ................................................................................7 Switching Characteristics ................................................8 Switching Waveforms ....................................................10 Document Number: 38-06045 Rev. *K Page 2 of 22