CY7C1019D 1-Mbit (128 K 8) Static RAM 1-Mbit (128 K 8) Static RAM Features Functional Description 1 Pin- and function-compatible with CY7C1019B The CY7C1019D is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion High speed is provided by an active LOW Chip Enable (CE), an active LOW t = 10 ns AA Output Enable (OE), and tri-state drivers. This device has an automatic power-down feature that significantly reduces power Low active power consumption when deselected. The eight input and output pins I = 80 mA 10 ns CC (IO through IO ) are placed in a high-impedance state when: 0 7 Low CMOS standby power Deselected (CE HIGH) I = 3 mA SB2 Outputs are disabled (OE HIGH) 2.0 V Data retention When the write operation is active (CE LOW, and WE LOW). Automatic power-down when deselected Write to the device by taking Chip Enable (CE) and Write Enable CMOS for optimum speed/power (WE) inputs LOW. Data on the eight IO pins (IO through IO ) is 0 7 then written into the location specified on the address pins (A 0 Center power/ground pinout through A ). 16 Easy memory expansion with CE and OE options Read from the device by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under Functionally equivalent to CY7C1019B these conditions, the contents of the memory location specified Available in Pb-free 32-pin 400-Mil wide Molded SOJ and by the address pins appears on the IO pins. 32-pin TSOP II packages The CY7C1019D device is suitable for interfacing with processors that have TTL I/P levels. It is not suitable for processors that require CMOS I/P levels. Please see Electrical Characteristics on page 4 for more details and suggested alternatives. For a complete list of related documentation, click here. Logic Block Diagram INPUT BUFFER IO 0 IO 1 A 0 A IO 1 2 A 2 128K x 8 A IO 3 3 A 4 ARRAY A IO 5 4 A 6 IO A 5 7 A 8 IO 6 CE IO POWER 7 COLUMN DECODER WE DOWN OE Note 1. For guidelines on SRAM system design, please refer to the System Design Guidelines Cypress application note, available on the internet at www.cypress.com. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-05464 Rev. *J Revised November 26, 2014 ROW DECODER A 9 A 10 A 11 A 12 A 13 A 14 A 15 A 16 SENSE AMPSCY7C1019D Contents Pin Configuration .............................................................3 Ordering Information ...................................................... 11 Selection Guide ................................................................3 Ordering Code Definitions ......................................... 11 Maximum Ratings .............................................................4 Package Diagrams .......................................................... 12 Operating Range ...............................................................4 Acronyms ........................................................................14 Electrical Characteristics .................................................4 Document Conventions ................................................. 14 Capacitance ......................................................................5 Units of Measure ....................................................... 14 Thermal Resistance ..........................................................5 Document History Page ................................................. 15 AC Test Loads and Waveforms .......................................5 Sales, Solutions, and Legal Information ...................... 16 Data Retention Characteristics .......................................6 Worldwide Sales and Design Support ....................... 16 Data Retention Waveform ................................................6 Products ....................................................................16 Switching Characteristics ................................................7 PSoC Solutions ...................................................... 16 Switching Waveforms ......................................................8 Cypress Developer Community ................................. 16 Truth Table ......................................................................11 Technical Support ..................................................... 16 Document Number: 38-05464 Rev. *J Page 2 of 16