CY7C1059DV33 8-Mbit (1M 8) Static RAM Features Functional Description High speed The CY7C1059DV33 is a high performance CMOS Static RAM organized as 1M words by 8 bits. Easy memory expansion is t = 10 ns AA provided by an active LOW Chip Enable (CE), an active LOW Low active power Output Enable (OE), and tri-state drivers. To write to the device, I = 110 mA at f = 100 MHz take Chip Enable (CE) and Write Enable (WE) inputs LOW. Data CC on the eight I/O pins (I/O through I/O ) is then written into the 0 7 Low CMOS standby power location specified on the address pins (A through A ). 0 19 I = 20 mA SB2 To read from the device, take Chip Enable (CE) and Output 2.0 V data retention Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified Automatic power down when deselected by the address pins appear on the I/O pins. TTL-compatible inputs and outputs The eight input or output pins (I/O through I/O ) are placed in a 0 7 high impedance state when the device is deselected (CE HIGH), Easy memory expansion with CE and OE features the outputs are disabled (OE HIGH), or a write operation is in Available in Pb-free 44-pin TSOP-II package progress (CE LOW and WE LOW). Offered in standard and high reliability (Q) grades The CY7C1059DV33 is available in 44-pin TSOP-II package with center power and ground (revolutionary) pinout. Logic Block Diagram IO INPUT BUFFER 0 A 0 A 1 IO A 1 2 A 3 IO 2 A 4 A 5 1M x 8 IO 3 A 6 A 7 IO ARRAY 4 A 8 A 9 IO 5 A 10 IO 6 CE IO POWER 7 COLUMN DECODER WE DOWN OE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document : 001-00061 Rev. *H Revised September 12, 2011 ROW DECODER A 11 A 12 A 13 A 14 A 15 A 16 A 17 A 18 A 19 SENSE AMPSCY7C1059DV33 Pin Configuration Figure 1. 44-Pin TSOP II Top View 44 1 NC NC NC 2 43 NC 42 A 3 NC 0 4 41 A A 1 18 40 A 5 A 2 17 39 A 6 A 3 16 38 A 7 A 4 15 37 CE 8 OE 36 I/O 9 I/O 0 7 35 10 I/O I/O 1 6 34 V 11 V SS CC 33 V 12 V SS CC 32 I/O 13 I/O 2 5 I/O 31 I/O 14 3 4 30 WE 15 A 14 A 29 A 16 5 13 28 A 17 A 6 12 18 27 A A 11 7 19 A 26 A 8 10 A 20 25 A 9 19 NC 21 NC 24 NC 22 23 NC Selection Guide Description 10 12 Unit Maximum access time 10 12 ns Maximum operating current 110 100 mA Maximum CMOS standby current 20 20 mA Document : 001-00061 Rev. *H Page 2 of 11