CY7C1061DV33 16-Mbit (1 M 16) Static RAM 16-Mbit (1 M 16) Static RAM Features Functional Description High speed The CY7C1061DV33 is a high performance CMOS Static RAM organized as 1,048,576 words by 16 bits. t = 10 ns AA To write to the device, take Chip Enables (CE LOW and CE 1 2 Low active power HIGH) and Write Enable (WE) input LOW. If Byte Low Enable I = 175 mA at 100 MHz CC (BLE) is LOW, then data from I/O pins (I/O through I/O ), is 0 7 Low CMOS standby power written into the location specified on the address pins (A through 0 A ). If Byte High Enable (BHE) is LOW, then data from I/O pins I = 25 mA 19 SB2 (I/O through I/O ) is written into the location specified on the 8 15 Operating voltages of 3.3 0.3 V address pins (A through A ). 0 19 2.0 V data retention To read from the device, take Chip Enables (CE LOW and CE 1 2 HIGH) and Output Enable (OE) LOW while forcing the Write Automatic power down when deselected Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins appears TTL compatible inputs and outputs on I/O to I/O . If Byte High Enable (BHE) is LOW, then data from 0 7 Easy memory expansion with CE and CE features 1 2 memory appears on I/O to I/O . See Truth Table on page 12 8 15 for a complete description of Read and Write modes. Available in Pb-free 54-pin TSOP II and 48-ball VFBGA packages The input or output pins (I/O through I/O ) are placed in a high 0 15 impedance state when the device is deselected (CE HIGH/CE 1 2 Offered in single CE and dual CE options LOW), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE 1 LOW, CE HIGH, and WE LOW). 2 The CY7C1061DV33 is available in a 54-pin TSOP II package with center power and ground (revolutionary) pinout, and 48-ball VFBGA packages. For a complete list of related documentation, click here. Logic Block Diagram INPUT BUFFER A 0 A 1 A 2 A 3 I/O I/O 1M x 16 0 7 A 4 ARRAY A 5 I/O I/O 8 15 A 6 A 7 A 8 A 9 COLUMN DECODER BHE WE CE 2 CE 1 OE BLE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-05476 Rev. *J Revised October 27, 2015 ROW DECODER A 10 A 11 A12 A 13 A 14 A15 A16 A 17 A 18 A 19 SENSE AMPSCY7C1061DV33 Contents Selection Guide ................................................................3 Ordering Information ...................................................... 13 Pin Configurations ...........................................................3 Ordering Code Definitions ......................................... 13 Maximum Ratings .............................................................5 Package Diagrams .......................................................... 14 Operating Range ...............................................................5 Acronyms ........................................................................16 DC Electrical Characteristics ..........................................5 Document Conventions ................................................. 16 Capacitance ......................................................................6 Units of Measure ....................................................... 16 Thermal Resistance ..........................................................6 Document History Page ................................................. 17 AC Test Loads and Waveforms .......................................6 Sales, Solutions, and Legal Information ...................... 19 Data Retention Characteristics .......................................7 Worldwide Sales and Design Support ....................... 19 Over the Operating Range ...............................................7 Products ....................................................................19 Data Retention Waveform ................................................7 PSoC Solutions ...................................................... 19 AC Switching Characteristics .........................................8 Cypress Developer Community ................................. 19 Switching Waveforms ......................................................9 Technical Support ..................................................... 19 Truth Table ......................................................................12 Truth Table ......................................................................12 Document Number: 38-05476 Rev. *J Page 2 of 19