CY7C1069DV33 16-Mbit (2 M 8) Static RAM 16-Mbit (2 M 8) Static RAM Features Functional Description High speed The CY7C1069DV33 is a high performance CMOS Static RAM organized as 2,097,152 words by 8 bits. t = 10 ns AA To write to the device, take Chip Enables (CE LOW and CE 1 2 Low active power HIGH) and Write Enable (WE) input LOW. Data on the eight I/O I = 175 mA at 100 MHz CC pins (I/O through I/O ) is then written into the location specified 0 7 Low complementary metal oxide semiconductor (CMOS) on the address pins (A through A ). 0 20 standby power To read from the device, take Chip Enables (CE LOW and CE 1 2 I = 25 mA SB2 HIGH) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. Under these conditions, the contents of the Operating voltages of 3.3 0.3 V memory location specified by the address pins will appear on the 2.0 V data retention I/O pins. See Truth Table on page 10 for a complete description of Read and Write modes. Automatic power-down when deselected The input and output pins (I/O through I/O ) are placed in a high 0 7 Transistor-transistor logic (TTL) compatible inputs and outputs impedance state when the device is deselected (CE HIGH or 1 CE LOW), the outputs are disabled (OE HIGH), or during a write 2 Easy memory expansion with CE and CE features 1 2 operation (CE LOW, CE HIGH, and WE LOW). 1 2 Available in Pb-free 54-pin thin small outline package (TSOP) The CY7C1069DV33 is available in a 54-pin TSOP II package Type II and 48-ball very fine-pitch ball grid array (VFBGA) with center power and ground (revolutionary) pinout, and a packages. 48-ball very fine-pitch ball grid array (VFBGA) package. For a complete list of related documentation, click here. Logic Block Diagram INPUT BUFFER A 0 A 1 A 2 A 3 I/O I/O 2 M x 8 0 7 A 4 ARRAY A 5 A 6 A 7 A 8 A 9 WE COLUMN CE DECODER 2 OE CE 1 Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-05478 Rev. *H Revised November 20, 2014 ROW DECODER A 10 A 11 A 12 A13 A 14 A15 A 16 A 17 A 18 A 19 A 20 SENSE AMPSCY7C1069DV33 Contents Selection Guide ................................................................3 Ordering Information ...................................................... 10 Pin Configurations ...........................................................3 Ordering Code Definitions ......................................... 10 Maximum Ratings .............................................................4 Package Diagrams .......................................................... 11 Operating Range ...............................................................4 Acronyms ........................................................................13 DC Electrical Characteristics ..........................................4 Document Conventions ................................................. 13 Capacitance ......................................................................5 Units of Measure ....................................................... 13 Thermal Resistance ..........................................................5 Document History Page ................................................. 14 AC Test Loads and Waveforms .......................................5 Sales, Solutions, and Legal Information ...................... 15 AC Switching Characteristics .........................................6 Worldwide Sales and Design Support ....................... 15 Data Retention Characteristics .......................................7 Products ....................................................................15 Data Retention Waveform ................................................7 PSoC Solutions ......................................................... 15 Switching Waveforms ......................................................7 Truth Table ......................................................................10 Document Number: 38-05478 Rev. *H Page 2 of 15