CY7C107D CY7C1007D 1-Mbit (1 M 1) Static RAM 1-Mbit (1 M 1) Static RAM Features Functional Description 1 1 Pin- and function-compatible with CY7C107B/CY7C1007B The CY7C107D and CY7C1007D are high-performance CMOS static RAMs organized as 1,048,576 words by 1 bit. Easy High speed memory expansion is provided by an active LOW Chip Enable t = 10 ns AA (CE) and tri-state drivers. These devices have an automatic Low active power power-down feature that reduces power consumption by more I = 80 mA 10 ns CC than 65% when deselected. The output pin (D ) is placed in a OUT Low complementary metal oxide semiconductor (CMOS) high-impedance state when: standby power Deselected (CE HIGH) I = 3 mA SB2 When the write operation is active (CE and WE LOW) 2.0 V data retention Write to the device by taking Chip Enable (CE) and Write Enable Automatic power-down when deselected (WE) inputs LOW. Data on the input pin (D ) is written into the IN memory location specified on the address pins (A through A ). CMOS for optimum speed/power 0 19 Read from the device by taking Chip Enable (CE) LOW while Transistor transistor logic (TTL) compatible inputs and outputs while forcing Write Enable (WE) HIGH. Under these conditions, CY7C107D available in Pb-free 28-pin 400-Mil wide Molded the contents of the memory location specified by the address SOJ package. CY7C1007D available in Pb-free 28-pin 300-Mil pins appears on the data output (D ) pin. OUT wide Molded SOJ package The CY7C107D and CY7C1007D devices are suitable for interfacing with processors that have TTL I/P levels. It is not suitable for processors that require CMOS I/P levels. Please see Electrical Characteristics on page 4 for more details and suggested alternatives. For a complete list of related documentation, click here. Logic Block Diagram D IN INPUT BUFFER A 0 A 1 A 2 1M x 1 A 3 A D 4 OUT A ARRAY 5 A 6 A 7 A 8 CE POWER COLUMN DECODER WE DOWN Note 1. For guidelines on SRAM system design, please refer to the System Design Guidelines Cypress application note, available on the internet at www.cypress.com. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-05469 Rev. *K Revised November 24, 2014 ROW DECODER A 9 A 10 A 11 A 12 A 13 A 14 A 15 A 16 A 17 A 18 A 19 SENSE AMPSCY7C107D CY7C1007D Contents Pin Configuration .............................................................3 Ordering Information ...................................................... 10 Selection Guide ................................................................3 Ordering Code Definitions ......................................... 10 Maximum Ratings .............................................................4 Package Diagrams .......................................................... 11 Operating Range ...............................................................4 Acronyms ........................................................................13 Electrical Characteristics .................................................4 Document Conventions ................................................. 13 Capacitance ......................................................................5 Units of Measure ....................................................... 13 Thermal Resistance ..........................................................5 Document History Page ................................................. 14 AC Test Loads and Waveforms .......................................5 Sales, Solutions, and Legal Information ...................... 15 Data Retention Characteristics .......................................6 Worldwide Sales and Design Support ....................... 15 Data Retention Waveform ................................................6 Products ....................................................................15 Switching Characteristics ................................................7 PSoC Solutions ...................................................... 15 Switching Waveforms ......................................................8 Cypress Developer Community ................................. 15 Truth Table ......................................................................10 Technical Support ..................................................... 15 Document Number: 38-05469 Rev. *K Page 2 of 15