CYRF89435 PRoC - CapSense PRoC - CapSense In-system serial programming (ISSP) PRoC-CS Features Precision, programmable clocking Single Device, Two functions Internal main oscillator (IMO): 6/12/24 MHz 5% 8-bit flash based CapSense controller MCU function and Internal low-speed oscillator (ILO) at 32 kHz for watchdog 2.4-GHz WirelessUSB NL radio transceiver function in a and sleep timers single device Precision 32 kHz oscillator for optional external crystal Wide operating range: 1.9 V to 3.6 V Programmable pin configurations Configurable capacitive sensing elements Up to 13 general-purpose I/Os (GPIOs) 7 A per sensor at 500 ms scan rate Dual mode GPIO: All GPIOs support digital I/O and analog Supports SmartSense Auto-tuning inputs Supports a combination of CapSense buttons, sliders, and 25-mA sink current on each GPIO proximity sensors 120 mA total sink current on all GPIOs SmartSense EMC offers superior noise immunity for Pull-up, high Z, open-drain modes on all GPIOs applications with challenging conducted and radiated noise conditions CMOS drive mode 5 mA source current on ports 0 and 1 and 1 mA on port 2 RF Attributes 20 mA total source current on all GPIOs 2.4-GHz WirelessUSB-NL Transceiver function Versatile analog system Operates in the 2.4-GHz ISM Band (2.402 GHz - 2.479 GHz) Low-dropout voltage regulator for all analog resources 1-Mbps over-the-air data rate Common internal analog bus enabling capacitive sensing on Receive sensitivity typical: 87 dBm all pins 1 A typical current consumption in sleep state High power supply rejection ratio (PSRR) comparator Closed-loop frequency synthesis 8 to 10-bit incremental analog-to-digital converter (ADC) Supports frequency-hopping spread spectrum On-chip packet framer with 64-byte first in first out (FIFO) Additional system resources data buffer 2 I C slave: Built-in auto-retry-acknowledge protocol simplifies usage Selectable to 50 kHz, 100 kHz, or 400 kHz Built-in cyclic redundancy check (CRC), forward error SPI master and slave: Configurable 46.9 kHz to 12 MHz correction (FEC), data whitening Three 16-bit timers Additional outputs for interrupt request (IRQ) generation Watchdog and sleep timers Digital readout of received signal strength indication (RSSI) Integrated supervisory circuit MCU Attributes Emulated E2PROM using flash memory Powerful Harvard-architecture processor Complete development tools M8C CPU Up to 4 MIPS with 24 MHz Internal clock, external Free development tool (PSoC Designer) crystal resonator or clock signal Full-featured, in-circuit emulator (ICE) and programmer Low power at high speed Full-speed emulation Temperature range: 0 C to +70 C Complex breakpoint structure Flexible on-chip memory 128 KB trace memory 32 KB Flash/2 KB SRAM Package option 50,000 flash erase/write cycles 40-pin 6 mm 6 mm QFN Partial flash updates Flexible protection modes Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-76581 Rev. *G Revised May 18, 2017 Not recommended for new designsCYRF89435 Logical Block Diagram PWR Sys Port 2 Port 1 Port 0 Prog. LDO (Regulator) System Bus PSoC Core Global Analog Connect SRAM 2048 Bytes SROM 32K Flash Sleep and CPU Core (M8C) Interrupt Watchdog Controller 6/12/24 MHz Internal Main Oscillator Internal Low Speed Oscillator (ILO Multiple Clock Sources CapSense Analog System Reference CapSense CapS Module Two Comparators Analog Mux V V IN OUT V WIRELESSUSB-NL DD IO GFSK SYSTEM LDO Linear Regulator Modulator PKT PA FIFO ANT VCO Synthesizer ANTb RST n Pwr/ Reset BRCLK GFSK Demodulator X Xtal Osc LNA + BPF Image Rej . Mxr. XTALi XTALo SPI POR Internal Voltage System Three 16 bit Digital I2C Slave Master/ and References Resets Timers Clocks Slave LVD SYSTEM RESOURCES Document Number: 001-76581 Rev. *G Page 2 of 39 SPI Regi st er s Framer Not recommended for new designs