M21170
3.2 Gbps 288x288 Asynchronous Crosspoint Switch
The M21170 is a high-performance, 288x288, asynchronous non-blocking crosspoint switch featuring 82,944
unique switching paths. It is ideally suited for high-speed data switching in datacom, telecom, and video
applications.
Each switching path can operate independently at any data rate of up to 3.2 Gbps, allowing for multi-rate routing
and switching in one single device. The M21170 includes per lane, programmable, input equalization and output
de-emphasis, enabling optimal compensation for board trace losses and making the device ideal for designs in
very large systems.
To alleviate the power consumption and heat dissipation challenges in such systems, the output swing level for
each lane may be set individually, providing flexibility and optimization of power dissipation without compromised
performance. All unused output drivers, in addition to all paths not exercised within the device, are automatically
disabled for maximum power savings.
2
The device is configurable through standard 2-wire (I C compatible) and 4-wire serial interfaces, as well as a 9-bit
parallel interface.
Individual input termination control (High-Z or 50 )
Applications
Support for multiple switch points
Digital video switchers/routers
Loss of signal alarm per input
DWDM routers
Flexible configuration through standard 2-wire and 4-wire serial
Backplane switching and signal conditioning
interfaces, as well as parallel interface
1.2 V core, 1.2 V output, and optional 1.2 V/1.8 V/2.5 V input supply
voltages
Features
DC and AC coupling support at input/output
Fully non-blocking matrix array
Electrically independent input and output supply voltage rails for
Protocol agnostic
increased flexibility
Global or individual programmable input equalization and output de-
JTAG boundary scan
emphasis
Global or individual programmable output swing level
Routing Switcher Application Diagram M21170 Device Architecture
M21170
Crosspoint
Configuration & Control
JTAG
Registers
Backplane
21170-DSH-001-E Mindspeed Technologies September 2011
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Line Card 1
Switch Card
Line Card N
Programmable Input Equalization
Loss of signal Detection
Programmable Output De-emphasis
&
Programmable Swing ControlOrdering Information
Part Number Package Operating Temperature
M21170G-12* 2389-pin, 50 mm x 50 mm BGA -40 C to 85 C
* The letter G designator after the part number indicates that the device is RoHS compliant. Refer to www.mindspeed.com for additional
information.
Revision History
Revision Level Date Description
E Release September 2011 Figure 4-20, Figure 4-21, and Figure 4-22: t and t labels were inverted in the timing
DD DRIVER
diagrams.
Updated the data sheet format to reflect new register naming convention.
D Release December 2010 Limited AV voltage to 1.2 V only. Removed 1.8 V support, once 1.8 V lifetime reliability
DD0
testing is completed, support for AV at 1.8 V will be restored.
DDO
Updated Table 1-2 junction to case thermal resistance from TBD to 0.55 C/W.
Updated Table 1-4 power consumption specifications, tightened maximum power and current
consumption limits.
Section 4.10, Page21h temperature monitoring, register 041h, removed the 1 sigma value =
1.6 C.
2
Figure 4-11 updated to include Read and Write I C description.
Figure 4-21 and Figure 4-22 updated to show the correct Tdd and Tdriver definition for the
parallel interface timing specifications.
Section 4.5 juntion temperature monitor. Removed the uncalibrated accuracy of the sensors.
Updated Figure 2-1 and Figure 2-2 to show point blank operation at 3.2 Gbps.
Added Figure 2-6, Agilent BERT N4903A Backplan FR4 traces used to measure input
Equalization performance on Figure 2-5.
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