74AC574 74ACT574 Octal D-Type Flip-Flop with 3-STATE Outputs
September 1988
Revised March 2005
74AC574 74ACT574
Octal D-Type Flip-Flop with 3-STATE Outputs
General Description Features
The AC/ACT574 is a high-speed, low power octal flip-flop I and I reduced by 50%
CC OZ
with a buffered common Clock (CP) and a buffered com-
Inputs and outputs on opposite sides of package
mon Output Enable (OE). The information presented to the
allowing easy interface with microprocessors
D-type inputs is stored in the flip-flops on the LOW-to-HIGH
Useful as input or output port for microprocessors
Clock (CP) transition.
Functionally identical to AC/ACT374
The AC/ACT574 is functionally identical to the AC/ACT374
3-STATE outputs for bus-oriented applications
except for the pinouts.
Outputs source/sink 24 mA
ACT574 has TTL-compatible inputs
Ordering Code:
Order Number Package Number Package Description
74AC574SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74AC574SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC574MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC574PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74ACT574SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ACT574SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT574MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT574PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
FACT is a trademark of Fairchild Semiconductor Corporation.
2005 Fairchild Semiconductor Corporation DS009910 www.fairchildsemi.comLogic Symbols Pin Descriptions
Pin Names Description
D D Data Inputs
0 7
CP Clock Pulse Input
OE 3-STATE Output Enable Input
O O 3-STATE Outputs
0 7
IEEE/IEC
Function Table
Inputs Internal Outputs Function
O
OE CP D Q
N
HH L NC Z Hold
H H H NC Z Hold
H L L Z Load
H H H Z Load
L L L L Data Available
L H H H Data Available
L H L NC NC No Change in Data
Connection Diagram
L H H NC NC No Change in Data
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
Z High Impedance
LOW-to-HIGH Transition
NC No Change
Functional Description
The AC/ACT574 consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The buffered clock and buffered Output Enable are com-
mon to all flip-flops. The eight flip-flops will store the state
of their individual D-type inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP)
transition. With the Output Enable (OE) LOW, the contents
of the eight flip-flops are available at the outputs. When OE
is HIGH, the outputs go to the high impedance state. Oper-
ation of the OE input does not affect the state of the flip-
flops.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74AC574 74ACT574