74VHCT138AMX ON Semiconductor

74VHCT138A 3-to-8 Decoder/Demultiplexer May 2007 74VHCT138A tm 3-to-8 Decoder/Demultiplexer Features General Description High Speed: t = 7.6ns (Typ.) at V = 5V The VHCT138A is an advanced high speed CMOS PD CC 3-to-8 DECODER fabricated with silicon gate CMOS Low power dissipation: I = 4A (Max.) at T = 25C CC A technology. It achieves the high speed operation similar Power down protection is provided on all inputs and to equivalent Bipolar Schottky TTL while maintaining the outputs CMOS low power dissipation. Pin and function compatible with 74HCT138 When the device is enabled, 3 Binary Select inputs (A , A and A ) determine which one of the outputs 0 1 2 (O O ) will go LOW. When enable input E is held 0 7 3 LOW or either E or E is held HIGH, decoding function 1 2 is inhibited and all outputs go HIGH. E , E and E inputs 3 1 2 are provided to ease cascade connection and for use as an address decoder for memory systems. Protection circuits ensure that 0V to 7V can be applied to the input pins without regard to the supply voltage and to the out- put pins with V = 0V. These circuits prevent device CC destruction due to mismatched supply and input/output voltages. This device can be used to interface 3V to 5V systems and two supply systems such as battery backup. Ordering Information Order Number Package Package Description Number 74VHCT138AM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74VHCT138ASJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHCT138AMTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter X to the ordering number. 1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHCT138A Rev. 1.274VHCT138A 3-to-8 Decoder/Demultiplexer Connection Diagram Logic Symbols IEEE/IEC Pin Description Pin Names Description A A Address Inputs 0 2 E E Enable Inputs 1 2 E Enable Input 3 O O Outputs 0 7 Truth Table Inputs Outputs E E E A A A O O O O O O O O 1 2 3 0 1 2 0 1 2 3 4 5 6 7 H XXXXX HHHHHHHH XH XXXX HHHHHHHH X XL XXX HHHHHHHH LL H LLLL HHHHHHH LL HH L L H L HHHHHH L LHLHLH HL HHHHH LL HHH L HHH L HHHH L LHL L HHHHH L HHH LL HH L HHHHHH L H H L LHL HHHHHHHH L H LL HHHHHHHHHHH L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial 1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHCT138A Rev. 1.2 2