ASM3P2107AF-08SR ON Semiconductor

ASM3P2107A Peak EMI Reducing Solution Features by reducing the number of circuit board layers, ferrite beads, shielding, and other passive components that are FCC approved method of EMI attenuation. traditionally required to pass EMI regulations. Generates a 1X low EMI spread spectrum clock of the input frequency. The ASM3P2107A uses the most efficient and optimized Input frequency range: 12MHz to 22MHz. modulation profile approved by the FCC and is Internal loop filter minimizes external components implemented in a proprietary all digital method. and board space. The ASM3P2107A modulates the output of a single PLL Frequency deviation: - 0.8%( Typ) 20MHz. in order to spread the bandwidth of a synthesized clock, Low cycle-to-cycle jitter. and more importantly, decreases the peak amplitudes of 5.0V 5% operating voltage range. its harmonics. This results in significantly lower system TTL or CMOS compatible outputs. EMI compared to the typical narrow band signal produced Available in 8-pin TSSOP and SOIC package. by oscillators and most frequency generators. Lowering EMI by increasing a signals bandwidth is called spread Product Description spectrum clock generation. The ASM3P2107A is a versatile spread spectrum Applications frequency modulator designed specifically for input clock The ASM3P2107A is targeted towards EMI management frequencies from 12MHz to 22MHz. The ASM3P2107A for high speed digital applications such as PC peripheral can generate an EMI reduced clock from crystal, ceramic devices, consumer electronics and embedded controller resonator, or system clock. systems. The ASM3P2107A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data dependent signals. The ASM3P2107A allows significant system cost savings V DD Block Diagram PLL Modulation XIN Crystal Frequency XOUT Oscillator Divider Output Phase Loop VCO Divider Detector Filter Feedback Divider CLOCKOUT GND 2010 SCILLC. All rights reserved. Publication Order Number: October 2010 Rev. 2 ASM3P2107/D ASM3P2107A Pin Configuration XIN / CLKIN 1 8 NC XOUT NC 2 7 ASM3P2107A GND VDD 6 3 5 CLOCKOUT NC 4 Pin Description Pin Pin Name Type Description Crystal connection or external reference frequency input. This pin has dual functions. It 1 XIN / CLKIN I can be connected to either an external crystal or an external reference clock. 2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 3 GND P Ground to entire chip. 4 NC - No connect. 5 CLOCKOUT O Spread spectrum low EMI output. 6 VDD P Power supply for the entire chip (5V). 7 NC - No connect. 8 NC - No connect. Absolute Maximum Ratings Symbol Parameter Rating Unit V , V Voltage on any pin with respect to Ground -0.5 to +7.0 V DD IN T Storage temperature -65 to +125 C STG T Operating temperature 0 to 70 C A T Max. Soldering Temperature (10 sec) 260 C s T Junction Temperature 150 C J Static Discharge Voltage T 2 KV DV (As per JEDEC STD22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Operating Conditions Parameter Description Min Max Unit VDD Supply Voltage 4.75 5.25 V T Operating Temperature (Ambient Temperature) -40 +85 C A C Load Capacitance 15 pF L C Input Capacitance 7 pF IN Rev. 1 Page 2 of 6 www.onsemi.com