ESD7181, SZESD7181 ESD Protection Diode MicroPackaged Diodes for ESD Protection The ESD7181 is designed to protect voltage sensitive components that require ultralow capacitance from ESD and transient voltage events. Excellent clamping capability, low capacitance, low leakage, www.onsemi.com and fast response time make these parts ideal for ESD protection on designs where board space is at a premium. It has industry leading capacitance linearity over voltage making it ideal for RF applications. 12 Features Low Capacitance 0.3 pF (Typical) Low Clamping Voltage MARKING Small Body Outline Dimensions: (0.62 x 0.32 mm) 0201 DIAGRAM Low Body Height: 0.3 mm PIN 1 Working Voltage: 18.5 V X3DFN2 Low Leakage < 1 nA (Typical) 2 M CASE 152AF Low Insertion Loss Low Dynamic Resistance: < 1 2 = Specific Device Code IEC6100042 Level 4 ESD Protection M = Date Code SZ Prefix for Automotive and Other Applications Requiring Unique *Date Code orientation and/or position may vary de- Site and Control Change Requirements AECQ101 Qualified and pending upon manufacturing location. PPAP Capable These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant ORDERING INFORMATION Device Package Shipping Typical Applications RF Signal ESD Protection ESD7181MUT5G X3DFN2 10000 / Tape & (PbFree) Reel Wireless Charger RF Switching, PA, and Antenna ESD Protection SZESD7181MUT5G X3DFN2 15000 / Tape & (PbFree) Reel Near Field Communications For information on tape and reel specifications, including part orientation and tape sizes, please MAXIMUM RATINGS (T = 25C unless otherwise noted) A refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Rating Symbol Value Unit IEC 6100042 (ESD) (Note 1) Air 15 kV IEC 6100042 (ESD) (Note 1) Contact 12 kV IEC 6100045 (ESD) (Note 2) 1 A Total Power Dissipation (Note 3) T = 25C P 250 mW A D Thermal Resistance, JunctiontoAmbient R 400 C/W JA Junction and Storage Temperature Range T , T 55 to C J stg +150 Lead Solder Temperature Maximum T 260 C L (10 Second Duration) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Nonrepetitive current pulse at T = 25C, per IEC6100042 waveform. A 2. Nonrepetitive current pulse at T = 25C, per IEC6100045 waveform. A 3. Mounted with recommended minimum pad size, DC board FR4 Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: October, 2017 Rev. 7 ESD7181MU/DESD7181, SZESD7181 ELECTRICAL CHARACTERISTICS I (T = 25C unless otherwise noted) A I PP Symbol Parameter I Maximum Reverse Peak Pulse Current PP I T I V Clamping Voltage I V V V R C PP C BR RWM V I V V V R RWM BR C V Working Peak Reverse Voltage RWM I T I Maximum Reverse Leakage Current V R RWM V Breakdown Voltage I BR T I PP I Test Current T BiDirectional *See Application Note AND8308/D for detailed explanations of datasheet parameters. ELECTRICAL CHARACTERISTICS (T = 25C unless otherwise noted) A Parameter Symbol Condition Min Typ Max Unit AC Working Voltage V 18.5 V RWM Breakdown Voltage (Note 4) V I = 1 mA 20.5 35 V BR T AC Reverse Current I V = 18.5 V < 1 50 nA R RVM Clamping Voltage (Note 5) V IEC6100042, 8 kV Contact See Figures 1 and 2 C Clamping Voltage TLP V I = 8 A 37.7 V C PP (Note 6) I = 16 A 40.4 PP I = 8 A 38.4 PP I = 16 A 41.1 PP Clamping Voltage (Note 6) Vc I = 1 A 8/20 s 35 V PP Junction Capacitance C V = 0 V, f = 1 MHz 0.1 0.3 0.50 pF J R V = 0 V, f = 1 GHz 0.1 0.15 0.50 R Dynamic Resistance R TLP Pulse 0.44 DYN Insertion Loss f = 1 MHz 0.045 dB f = 8.5 GHz 0.335 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1. 5. For test procedure see Figures 3 and 4 and application note AND8307/D. 6. ANSI/ESD STM5.5.1 Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z = 50 , t = 100 ns, t = 4 ns, averaging window t = 30 ns to t = 60 ns. 0 p r 1 2 TYPICAL CHARACTERISTICS 160 20 140 0 120 20 100 40 80 60 60 80 40 100 20 120 0 140 20 160 25 0 25 50 75 100 125 150 175 25 0 25 50 75 100 125 150 175 TIME (ns) TIME (ns) Figure 1. Typical IEC6100042 + 8 kV Contact Figure 2. Typical IEC6100042 8 kV Contact ESD Clamping Voltage ESD Clamping Voltage www.onsemi.com 2 VOLTAGE (V) VOLTAGE (V)