FDMC9430L-F085 Dual N-Channel Logic Level PowerTrench MOSFET FDMC9430L -F085 Dual N-Channel Logic Level PowerTrench MOSFET 40 V, 12 A, 8.2 m Pin 1 G1 S1 S1 S1 Features Typical R = 6.3 m at V = 10V, I = 12 A D1 DS(on) GS D Typical Q = 15 nC at V = 10V, I = 12 A g(tot) GS D D2 UIS Capability RoHS Compliant Qualified to AEC Q101 S2 S2 G2 S2 Applications Power 33 Battery Protection Load Switching Bottom Drain2 Contact G2 8 1 G1 Point of Load S2 7 Q2 2 S1 Q1 S2 6 3 S1 S2 5 4 S1 Bottom Drain1 Contact MOSFET Maximum Ratings T = 25C unless otherwise noted. J Symbol Parameter Ratings Units V Drain-to-Source Voltage 40 V DSS V Gate-to-Source Voltage 12 V GS Drain Current - Continuous (V =10) (Note 1) T = 25C 12 GS C I A D Pulsed Drain Current T = 25C See Figure 4 C E Single Pulse Avalanche Energy (Note 2) 21.6 mJ AS Power Dissipation 11.4 W P D o o Derate Above 25C0.1W/ C o T , T Operating and Storage Temperature -55 to + 150 C J STG o R Thermal Resistance, Junction to Case 13 C/W JC o R Maximum Thermal Resistance, Junction to Ambient (Note 3) 65 C/W JA Notes: 1: Current is limited by bondwire configuration. 2: Starting T = 25C, L = 0.3mH, I = 12A, V = 40V during inductor charging and V = 0V during time in avalanche. J AS DD DD 3: R is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder JA mounting surface of the drain pins. R is guaranteed by design, while R is determined by the board design. The maximum rating JC JA 2 presented here is based on mounting on a 1 in pad of 2oz copper. Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMC9430L FDMC9430L-F085 Power 33 13 12mm 3000 units 2016 Semiconductor Components Industries, LLC. 1 Publication Order Number: August-2017, Rev. 2 FDMC9430L-F085/D FDMC9430L-F085 Dual N-Channel Logic Level PowerTrench MOSFET Electrical Characteristics T = 25C unless otherwise noted. J Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics B Drain-to-Source Breakdown Voltage I = 250A, V = 0V 40 - - V VDSS D GS o V = 40V, T = 25 C - - 1 A DS J I Drain-to-Source Leakage Current DSS o V = 0V T = 150 C (Note 4) - - 0.2 mA GS J I Gate-to-Source Leakage Current V = 12V - - 100 nA GSS GS On Characteristics V Gate to Source Threshold Voltage V = V , I = 250A11.83V GS(th) GS DS D I = 10A, V = 4.5V - 8.9 11.5 m D GS o R Drain to Source On Resistance T = 25 C - 6.3 8.0 m I = 12A, DS(on) J D o V = 10V T = 150 C (Note 4) - 10.2 13.0 m GS J Dynamic Characteristics C Input Capacitance - 984 - pF iss V = 20V, V = 0V, DS GS C Output Capacitance - 315 - pF oss f = 1MHz C Reverse Transfer Capacitance - 18 - pF rss R Gate Resistance V = 0.5V, f = 1MHz - 1.1 - g GS Q Total Gate Charge V = 0 to 10V -15 22 nC g(ToT) GS V = 32V DD Q Threshold Gate Charge V = 0 to 1V - 0.9 - nC I = 12A g(th) GS D Q Gate-to-Source Gate Charge -2.6 - nC gs Q Gate-to-Drain Miller Charge - 2.1 - nC gd Switching Characteristics t Turn-On Time - - 13 ns on t Turn-On Delay - 7 - ns d(on) t Rise Time - 2 - ns V = 20V, I = 12A, r DD D V = 10V, R = 6 t Turn-Off Delay - 17 - ns GS GEN d(off) t Fall Time - 2 - ns f t Turn-Off Time - - 28 ns off Drain-Source Diode Characteristics I = 12A, V = 0V - - 1.2 V SD GS V Source-to-Drain Diode Voltage SD I = 6A, V = 0V - - 1.1 V SD GS t Reverse-Recovery Time -32 48 ns V = 32V, I = 12A, rr DD F dI /dt = 100A/s Q Reverse-Recovery Charge - 16 24 nC SD rr Note: 4: The maximum value is specified by design at T = 150C. Product is not tested to this condition in production. J www.onsemi.com 2