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This literature is subject to all applicable copyright laws and is not for resale in any manner.FIN1022 2 X 2 LVDS High Speed Crosspoint Switch September 2001 Revised December 2001 FIN1022 2 X 2 LVDS High Speed Crosspoint Switch General Description Features This non-blocking 2x2 crosspoint switch has a fully differ- Low jitter, 800 Mbps full differential data path ential input to output data path for low noise generation and Worst case jitter of 190ps low pulse width distortion. The device can be used as a 23 with PRBS = 2 1 data pattern at 800 Mbps high speed crosspoint switch, 2:1 multiplexer, 1:2 demulti- Rail-to-rail common mode range is 0.5V to 3.25V plexer or 1:2 signal splitter. The inputs can directly interface with LVDS and LVPECL levels. Worst case power dissipation is less than 126 mW Open-circuit fail safe protection Fast switch time of 1.1 ns typical 35 ps typical pin channel to channel skew 3.3V power supply operation Non-blocking switch LVDS receiver inputs accept LVPECL signals directly 7.5 kV HBM ESD protection 16-lead SOIC package and TSSOP package Inter-operates with TIA/EIA 644-1995 specification See the Fairchild Interface Solutions web page for cross reference information: www.fairchildsemi.com/products/interface/lvds.html Ordering Code: Order Number Package Number Package Description FIN1022M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow FIN1022MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter X to the ordering code. Logic Symbol 2001 Fairchild Semiconductor Corporation DS500653 www.fairchildsemi.com