FS6377-01G-XTD ON Semiconductor

DATA SHEET www.onsemi.com Programmable 3-PLL Clock Generator IC SOIC16 FS6377 CASE 751BA General Description MARKING DIAGRAM The FS6377 is a CMOS clock generator IC designed to minimize cost and component count in a variety of electronic systems. Three 16 2 I C programmable phase locked loops (PLLs) feeding four FS6377xxG programmable muxes and post dividers provide a high degree of AWLYWWG flexibility. 1 Features xx = 01 or 01i Three OnChip PLLs with Programmable Reference and Feedback A = Assembly Location Dividers WL = Wafer Lot Y = Year Four Independently Programmable Muxes and Post Dividers WW = Work Week 2 I CBus Serial Interface G = PbFree Package Programmable PowerDown of All PLLs and Output Clock Drivers One PLL and Two Mux/PostDivider Combinations can be ORDERING INFORMATION Modified by SEL CD Input Tristate Outputs for Board Testing Device Package Shipping 5 V to 3.3 V Operation SOIC16 48 Units / FS637701GXTD (Pb-Free) Tube Accepts 5 MHz to 27 MHz Crystal Resonators SOIC16 3000 / FS637701GXTP Commercial and Industrial Temperature Ranges Offered (Pb-Free) Tape & Reel These Devices are PbFree, Halogen Free/BFR Free and are 48 Units / SOIC16 FS637701iGXTD RoHS Compliant Tube (Pb-Free) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 1 Publication Order Number: Semiconductor Components Industries, LLC, 2008 FS6377/D September, 2021 Rev. 5FS6377 1 SDA 16 SCL 2 SEL CD 15 CLK A 3 PD 14 VDD 4 13 VSS CLK B FS6377 XIN 5 12 CLK C VSS XOUT 6 11 OE 7 10 CLK D VDD ADDR 8 9 16PIN (0.150) SOIC Figure 1. Pin Configuration Table 1. PIN DESCRIPTION (Note 1) Pin Type Name Description U 1 DI O SDA Serial interface data input/output U 2 DI SEL CD Selects one of two PLL C, mux D/C and post divider C/D combinations U 3 DI PD Power-down input 4 P VSS Ground 5 AI XIN Crystal oscillator input 6 AO XOUT Crystal oscillator output U 7 DI OE Output enable input 8 P VDD Power supply (5 V to 3.3 V) U 9 DI ADDR Address select 10 DO CLK D D clock output 11 P VSS Ground 12 DO CLK C C clock output 13 DO CLK B B clock output 14 P VDD Power supply (5 V to 3.3 V) 15 DO CLK A A clock output U 16 DI SCL Serial interface clock output U D 1. Key: AI: Analog Input AO = Analog Output DI = Digital Input DI = Input with Internal Pullup DI = Input with Internal Pulldown DIO = Digital Input/Output DI3 = Threelevel Digital Input DO = Digital Output P = Power/Ground = Active Low Pin. www.onsemi.com 2