I2811BF-08SR ON Semiconductor

P2811A/B and P2812A/B and P2814A/B Low Power EMI Reduction IC Features combinations of spread options and percentage deviations. Refer to Frequency Deviation and Spread FCC approved method of EMI attenuation Selection Table. These combinations include Down and Provides up to 15dB EMI reduction Center Spread, and percentage deviation range from Generates a 1x, 2x and 4x low EMI spread spectrum 0.625% to -3.5%. clock of the input frequency o 1x: P2811A/B The P28XX reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of o 2x: P2812A/B EMI of downstream clock and data dependent signals. o 4x: P2814A/B The P28XX allows significant system cost savings by Optimized for input frequency range from 10MHz to reducing the number of circuit board layers, ferrite beads, 40MHz shielding, and other passive components that are Internal loop filter minimizes external components traditionally required to pass EMI regulations. and board space The P28XX modulates the output of a single PLL in order Selectable spread options: to spread the bandwidth of a synthesized clock, and o Down Spread and Center Spread more importantly, decreases the peak amplitudes of its 8 frequency deviation selections: harmonics. This results in significantly lower system EMI o 0.625% to -3.5% compared to the typical narrow band signal produced by Low inherent Cycle-to-Cycle Jitter oscillators and most frequency generators. Lowering EMI 3.3V Operating Voltage by increasing a signals bandwidth is called spread CMOS/TTL compatible inputs and outputs. spectrum clock generation. Pin-out compatible with Cypress CY25811, CY25812 The P28XX uses the most efficient and optimized and CY25814 modulation profile approved by the FCC and is Available in 8-pin SOIC Package implemented in a proprietary all-digital method. Product Description Applications The P28XX devices are versatile spread spectrum The P28XX is targeted towards EMI management for frequency modulators designed specifically for a wide memory and LVDS interfaces in mobile graphic chipsets range of input clock frequencies from 10MHz to 40MHz. and high-speed digital applications such as PC peripheral Refer to Input/output Frequency Range Selection Table. devices, consumer electronics, and embedded controller The P28XX can generate an EMI reduced clock from systems. crystal, ceramic resonator, or system clock. The P28XX-A and the P28XX-B offer various 2010 SCILLC. All rights reserved. Publication Order Number: JUNE 2011 Rev. 2 P2811/D P2811A/B and P2812A/B and P2814A/B Block Diagram VDD D C SRS FRS PLL Modulation XIN / CLKIN Crystal Frequency Oscillator Divider Output Phase Loop VCO Divider Detector Filter XOUT Feedback Divider r ModOUT VSS Pin Configuration XIN / CLKIN 1 XOUT 8 VSS 2 P2811A/B VDD 7 P2812A/B P2814A/B D C 3 FRS 6 SRS ModOUT 4 5 Pin Description Pin Pin Name Type Description 1 XIN / CLKIN I Crystal connection or external Clock input. 2 VSS P Ground to entire chip. Digital logic input used to select Down (LOW) or Center (HIGH) spread options. 3 D C I (Refer to Frequency Deviation and Spread Selection Table). This pin has an internal pull-up resistor. Spread range select. Digital logic input used to select frequency deviation 4 SRS I (Refer to Frequency Deviation and Spread Selection Table). This pin has an internal pull-up resistor. 5 ModOUT O Spread spectrum clock output. Frequency range select. Digital logic input used to select Input frequency range 6 FRS I (Refer to Input/Output Frequency Range Selection Table). This pin has an internal pull-up resistor. 7 VDD P Power supply for the entire chip. Crystal connection. If using an external reference, this pin must be left 8 XOUT O unconnected Rev. 2 Page 2 of 6 www.onsemi.com