Ordering number : ENA0692 LV5609LP Bi-CMOS LSI Vertical Clock Driver for CCD LV5609LP Electrical Characteristics at Ta = 25C, V = 3.3V, V = 0V, VH = 15V, VL = -7.5V, VM = 0V, DD SS Unless otherwise specified Ratings Parameter Symbol Conditions Unit min typ max Static current drain I V pin 1 A DD DD IH VH pin 10 A IL VL pin 1 A Dynamic current drain I V pin See *1 and *2. 1 mA DD DD IH VH pin See *1 and *2. 2.4 4.5 mA IL VL pin See *1 and *2. 3 5 mA Output ON resistance RL I = +10mA 20 30 O RM I = 10mA 30 45 O RH I = -10mA 30 40 O RSHT I = -10mA 30 40 O Propagation delay time TPLM No load 200 ns TPMH No load 200 ns TPLH No load 200 ns TPML No load 200 ns TPHM No load 200 ns TPHL No load 200 ns Rise time TTLM VL VM V1, V3 See *1. 800 ns VL VM V2, V4 See *1. 800 ns TTMH VM VL V1, V3 See *1. 800 ns TTLH VL VH SHT See *1. 200 ns Fall time TTML VM VL V1, V3 See *1. 800 ns VM VL V2, V4 See *1. 800 ns TTHM VH VM V1, V3 See *1. 800 ns TTHL VH VL SHT See *1. 200 ns *1 : Refer to the CCD equivalent load shown below. *2 : Refer to the timing waveform on Page 7. 2000pF 2000pF 1000pF V1 V4 (Ternary) (Ternary) SHT 3000pF 3000pF 1600pF 1000pF V2 V3 (Binary) (Binary) 2000pF 2000pF No.A0692-2/8