MC100LVELT20DG ON Semiconductor

MC100LVELT20 3.3 VLVTTL/LVCMOS to Differential LVPECL Translator Description www.onsemi.com The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only + 3.3 V and ground are required. The small outline SOIC8 package and the 8 single gate of the MC100LVELT20 makes it ideal for those 1 applications where space, performance, and low power are at a premium. SOIC8 NB The 100 Series contains temperature compensation. D SUFFIX CASE 75107 Features 390 ps Typical Propagation Delay Maximum Input Clock Frequency > 0.8 GHz Typical MARKING DIAGRAM Operating Range V = 3.0 V to 3.6 V with GND = 0 V CC PNP TTL Input for Minimal Loading 8 KVT20 Q Output will Default HIGH with Input Open ALYW These Devices are Pb-Free, Halogen Free and are RoHS Compliant 1 A = Assembly Location L = Wafer Lot Y = Year W = Work Week = Pb-Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Device Package Shipping MC100LVELT20DG SOIC8 NB 98 Units/Tube (Pb-Free) MC100LVELT20DR2G SOIC-8 NB 2500/Tape & Reel (Pb-Free) For information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: July, 2016 Rev. 1 MC100LVELT20/DMC100LVELT20 Table 1. PIN DESCRIPTION NC 1 8 V CC Pin Function Q, Q Differential PECL Outputs D LVTTL Input LVTTL Q 2 7 D V Positive Supply CC GND Ground NC No Connect Q 3 6 NC LVPECL NC45 GND (Top View) Figure 1. 8-Lead Pinout and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model > 1.5 kV Machine Model > 200 V Charged Device Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg SOIC8 NB Level 1 Flammability Rating UL 94 V0 0.125 in Oxygen Index: 28 to 34 Transistor Count 150 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V Power Supply GND = 0 V 6 V CC V Input Voltage GND = 0 V V V 6 V I I CC I Output Current Continuous 50 mA out Surge 100 T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (Junction-to-Ambient) 0 lfpm SOIC8 NB 190 C/W JA 500 lfpm 130 Thermal Resistance (Junction-to-Case) Standard Board SOIC8 NB 41 to 44 C/W JC T Wave Solder (Pb-Free) 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2