MC100LVELT22 Translator, Dual LVTTL / LVCMOS to Differential LVPECL Description www.onsemi.com The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Due to LVPECL (Low Voltage Positive ECL) MARKING levels, only +3.3V and ground is required. The small 8lead package DIAGRAMS* outline with low skew dual gate design makes the MC100LVELT22 ideal for applications which require translation of a clock and/or data 8 8 signal. KVT22 1 ALYW SOIC8 Features D SUFFIX 350 ps Typical Propagation Delay 1 CASE 751 <100 ps OutputtoOutput Skew Flow Through Pinouts 8 8 The 100 Series Contains Temperature Compensation 1 KR22 LVPECL Operating Range: V = 3.15 V to 3.45 V CC TSSOP8 ALYW with GND = 0 V DT SUFFIX When Unused TTL Input is left Open, Q Output will Default High CASE 948R 1 These are PbFree Devices A = Assembly Location L = Wafer Lot Y = Year W = Work Week M = Date Code = PbFree Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: July, 2016 Rev. 12 MC100LVELT22/DMC100LVELT22 Table 1. PIN DESCRIPTION Q0 1 8 V CC PIN FUNCTION Qn, Qn LVPECL Differential Outputs Q0 2 7 D0 D0, D1 LVTTL/LVCMOS Inputs V Positive Supply CC LVTTL/ LVPECL GND Ground LVCMOS Q1 3 6 D1 Q145 GND Figure 1. 8Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model > 4 kV Machine Model > 200 V Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC8 Level 1 TSSOP8 Level 3 Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 0.125 in Transistor Count 164 Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V Positive Power Supply GND = 0 V 7 V CC V Input Voltage GND = 0 V V V 7 V I I CC I Output Current Continuous 50 mA out Surge 100 mA T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (JunctiontoAmbient) 0 lfpm SO8 190 C/W JA 500 lfpm SO8 130 C/W Thermal Resistance (JunctiontoCase) std bd SO8 41 to 44 5% C/W JC Thermal Resistance (JunctiontoAmbient) 0 lfpm TSSOP8 185 C/W JA 500 lfpm TSSOP8 140 C/W Thermal Resistance (JunctiontoCase) std bd TSSOP8 41 to 44 5% C/W JC T Wave Solder PbFree <2 to 3 sec 260C 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 2. JEDEC standard multilayer board 2S2P (2 signal, 2 power) www.onsemi.com 2