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MC100LVEP111 2.5V / 3.3V 2:1:10 Differential ECL/PECL/HSTL Clock Driver Description www.onsemi.com The MC100LVEP111 is a low skew 2:1:10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input MARKING multiplexer. The PECL input signals can be either differential or DIAGRAMS* singleended (if the V output is used). HSTL inputs can be used when BB the LVEP111 is operating under PECL conditions. The LVEP111 specifically guarantees low outputtooutput skew. Optimal design, layout, and processing minimize skew within a device and MC100 from device to device. LVEP111 To ensure tightest skew, both sides of differential outputs identically AWLYYWWG terminate into 50 even if only one output is being used. If an output LQFP32 32 FA SUFFIX pair is unused, both outputs may be left open (unterminated) without CASE 873A affecting skew. 1 The MC100LVEP111, as with most other ECL devices, can be operated from a positive V supply in PECL mode. This allows the CC 1 LVEP111 to be used for high performance clock distribution in +3.3 V or MC100 +2.5 V systems. Singleended CLK input operation is limited to a V CC 1 32 LVEP111 3.0 V in PECL mode, or V 3.0 V in NECL mode when using VBB EE AWLYYWW QFN32 (See Figure 11). Full operating range is available when using an external MN SUFFIX voltage reference (See Figure 10). Designers can take advantage of the CASE 488AM LVEP111s performance to distribute low skew clocks across the backplane or the board. A = Assembly Location WL = Wafer Lot Features YY = Year WW = Work Week 85 ps Typical DevicetoDevice Skew G or = PbFree Package 20 ps Typical OutputtoOutput Skew *For additional marking information, refer to Jitter Less than 1 ps RMS Application Note AND8002/D. Additive RMS Phase Jitter: 60 fs 156.25 MHz, Typ. Maximum Frequency > 3 GHz Typical ORDERING INFORMATION V Output BB See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. 430 ps Typical Propagation Delay The 100 Series Contains Temperature Compensation PECL and HSTL Mode Operating Range: V = 2.375 V to 3.8 V CC with V = 0 V EE NECL Mode Operating Range: V = 0 V CC with V = 2.375 V to 3.8 V EE Open Input Default State LVDS Input Compatible Fully Compatible with MC100EP111 These are PbFree Devices Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: August, 2015 Rev. 23 MC100LVEP111/D