NB7L111M 2.5V/3.3V, 6.125Gb/s 2:1:10 Differential Clock/Data Driver with CML Output Description www.onsemi.com The NB7L111M is a low skew 2:1:10 differential clock/data driver, designed with clock/data distribution in mind. It accepts two clock/data sources into multiplexer input and reproduces ten identical CML differential outputs. This device is ideal for clock/data distribution across the backplane or a board, and redundant clock switchover applications. 152 The input signals can be either differential or singleended (if the external reference voltage is provided). Differential inputs incorporate QFN52 internal 50 termination resistors and accept Negative ECL (NECL), MN SUFFIX Positive ECL (PECL), LVCMOS, LVTTL, CML, or LVDS (using CASE 485M appropriate power supplies). The differential 16 mA CML output provides matching internal 50 termination, and 400 mV output MARKING DIAGRAM* swing when externally terminated 50 to V . CC 52 The NB7L111M operates from a 2.5 V 5% supply or a 1 3.3 V 5% supply and is guaranteed over the full industrial NB7L temperature range of 40C to +85C. This device is packaged in a 111M low profile 8x8 mm, QFN52 package with 0.5 mm pitch (see AWLYYWWG package dimension on the back of the datasheet). Application notes, models, and support documentation are available at www.onsemi.com. A = Assembly Site Features WL = Wafer Lot YY = Year Maximum Input Clock Frequency > 5.5 GHz Typical WW = Work Week Maximum Input Data Rate > 6.125 Gb/s Typical G = PbFree Package < 0.5 ps Maximum Clock RMS Jitter *For additional marking information, refer to Application Note AND8002/D. < 15 ps Maximum Data Dependent Jitter at 3.125 Gb/s 50 ps Typical Rise and Fall Times 240 ps Typical Propagation Delay ORDERING INFORMATION 2 ps Typical Duty Cycle Skew See detailed ordering and shipping information on page 12 of 10 ps Typical Within Device Skew this data sheet. 15 ps Typical DevicetoDevice Skew Operating Range: V = 2.5 V 5 and 3.3 V 5 CC 400 mV Differential CML Output Swing 50 Internal Input and Output Termination Resistors These Devices are PbFree and are RoHS Compliant* *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: April, 2015 Rev. 7 NB7L111M/DNB7L111M Exposed Pad (EP) V 1 EE 39 V CC Q3 VTCLK0 38 2 Q3 3 37 CLK0 CLK0 4 36 V EE VTCLK0 5 35 Q4 VTSEL 6 34 Q4 QFN52 33 SEL 7 V EE SEL Q5 32 8 VTSEL Q5 9 31 VTCLK1 V 10 30 EE CLK1 11 29 Q6 CLK1 Q6 12 28 VTCLK1 V 13 27 CC Figure 1. Pinout (Top View) Q 0 Q 0 V CC Q 1 V EE Q 1 Q 2 VTCLK0 Q 2 50 Q 3 CLK0 Q 3 0 CLK0 Q 4 50 Q 4 VTCLK0 Q 5 VTCLK1 50 Q 5 CLK1 Q 6 1 CLK1 Q 6 50 Q 7 VTCLK1 Q 7 VTSEL R 50 1 Q 8 SEL Q 8 SEL Q 9 50 R R 2 3 Q 9 VTSEL Figure 2. Logic Diagram Table 1. FUNCTION TABLE SEL SEL CLK0/CLK0 CLK1/CLK1 LOW HIGH ON OFF HIGH LOW OFF ON www.onsemi.com 2 NC 14 52 NC V CC 15 V 51 CC Q9 16 50 Q0 Q9 17 Q0 49 V EE 18 48 V EE Q8 19 Q1 47 Q8 20 Q1 46 V EE 21 V EE 45 Q7 22 Q2 44 Q7 23 43 Q2 V 24 CC V 42 CC NC 25 41 NC V 26 40 V EE EE