NBA3N200SDR2G ON Semiconductor

NBA3N200S 3.3 V Automotive Grade M-LVDS Driver Receiver Description The NBA3N200S is a 3.3 V supply differential Multipoint Low Voltage (MLVDS) line Driver and Receiver for automotive www.onsemi.com applications. NBA3N200S offers the Type1 receiver threshold at 0.0 V. MARKING DIAGRAMS The NBA3N200S has Type1 receivers that detect the bus state with 8 as little as 50 mV of differential input voltage over a commonmode 8 1 voltage range of 1 V to 3.4 V. Type1 receivers have near zero NA200 SOIC8 AYWW thresholds (50 mV) and exhibit 25 mV of differential input voltage D SUFFIX hysteresis to prevent output oscillations with slowly changing signals CASE 751 1 or loss of input. NBA3N200S supports Simplex or Half Duplex bus configurations. NA200 = Specific Device Code A = Assembly Location Features Y = Year LowVoltage Differential 30 to 55 Line Drivers and Receivers WW = Work Week for Signaling Rates Up to 200 Mbps = PbFree Package Type1 Receivers Incorporate 25 mV of Hysteresis Controlled Driver Output Voltage Transition Times for Improved ORDERING INFORMATION Signal Quality See detailed ordering and shipping information on page 18 of 1 V to 3.4 V CommonMode Voltage Range Allows Data Transfer this data sheet. With up to 2 V of Ground Noise Bus Pins High Impedance When Disabled or VCC 1.5 V MLVDS Bus Power Up/Down Glitch Free Operating range: VCC = 3.3 10% V( 3.0 to 3.6 V) Operation from 40C to 125C AECQ100 Qualified and PPAP Capable These are PbFree Devices Applications LowPower HighSpeed ShortReach Alternative to TIA/EIA485 Backplane or Cabled Multipoint Data and Clock Transmission Cellular Base Stations CentralOffice Switches Network Switches and Routers Automotive Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: October, 2015 Rev. 3 NBA3N200S/DNBA3N200S R 1 8 V CC RE B 2 7 DE 3 A 6 4 D GND 5 Figure 1. Logic Diagram SOIC8 Figure 2. Pinout Diagram (Top View) Table 1. PIN DESCRIPTION Number Name I/O Type Open Default Description 1 R LVCMOS Output Receiver Output Pin 2 RE LVCMOS Input High Receiver Enable Input Pin (LOW = Active, HIGH = High Z Output) 3 DE LVCMOS Input Low Driver Enable Input Pin (LOW = High Z Output, HIGH=Active) 4 D LVCMOS Input Driver Input Pin 5 GND Ground Supply pin. Pin must be connected to power supply to guarantee proper operation. 6 A MLVDS Input Transceiver True Input/Output Pin /Output 7 B MLVDS Input Transceiver Invert Input/Output Pin /Output 8 VCC Power Supply pin. Pin must be connected to power supply to guarantee proper operation. www.onsemi.com 2