NBSG72A 2.5 V/3.3 VSiGe Differential 2 x 2 Crosspoint Switch with Output Level Select The NBSG72A is a high-bandwidth fully differential 2 2 crosspoint switch with Output Level Select (OLS) capabilities. This is NBSG72A Exposed Pad (EP) V Q0 Q0 OLS CC 16 15 14 13 V 1 12 V TD0 CC D0 2 11 Q1 NBSG72A D0 3 10 Q1 SELA 4 9 SELB 56 7 8 V D1 D1 V EE TD1 Figure 1. QFN16 Pinout (Top View) Table 1. PIN DESCRIPTION Pin No. Name I/O Description 1 VTD0 Common Internal 50 Termination Pin for D0 and D0 Input. See Table 4. (Note 1) 2 D0 LVDS, CML, ECL, Inverted Differential Input 0. LVTTL, LVCMOS Input 3 D0 LVDS, CML, ECL, Noninverted Differential Input 0. LVTTL, LVCMOS Input 4 SELA LVECL, LVCMOS Select Logic Input A. Internal 75 k Pulldown to V . EE Input 5 V Negative Supply. All V Pins must be Externally Connected to Power Supply to EE EE Guarantee Proper Operation. 6 D1 LVDS, CML, ECL, Inverted Differential Input 1. LVTTL, LVCMOS Input 7 D1 LVDS, CML, ECL, Noninverted Differential Input 1. LVTTL, LVCMOS Input 8 VTD1 Common Internal 50 Termination Pin for D1 and D1 Input. See Table 4. (Note 1) 9 SELB LVECL, LVCMOS Select Logic Input B. Internal 75 k Pulldown to V . EE Input 10 Q1 RSECL Output Noninverted Differential Output. 11 Q1 RSECL Output Inverted Differential Output. 12 V Positive Supply. All V Pins must be Externally Connected to Power Supply to CC CC Guarantee Proper Operation. 13 OLS Input Input Pin for Output Level Select (OLS) See Table 3. (Note 2) 14 Q0 RSECL Output Noninverted Differential Output Typically Terminated with 50 Resistor to V = V 2.0 V. TT CC 15 Q0 RSECL Output Inverted Differential Output Typically Terminated with 50 Resistor to V = V 2.0 V. TT CC 16 V Positive Supply. All V Pins must be Externally Connected to Power Supply to CC CC Guarantee Proper Operation. EP The Exposed Pad (EP) on the QFN16 package bottom is thermally connected to the die for improved heat transfer out of package. The exposed pad must be attached to a heat-sinking conduit. The pad is not electrically connected to the die but may be electrically and thermally connected to V on the PC board. EE 1. In the differential configuration when the input termination pins (VTD0, VTD1) are connected to a common termination voltage, and if no signal is applied then the device will be susceptible to self-oscillation. 2. When an output level of 400 mV is desired and V V > 3.0 V, 2 k resistor should be connected from OLS pin to V . CC EE EE