DATA SHEET www.onsemi.com 3 Amp V Termination TT Regulator DDR1, DDR2, DDR3, LPDDR3, DDR4 DFN10, 3x3, 0.5P CASE 506CL NCP51402 MARKING DIAGRAM The NCP51402 is a source/sink Double Data Rate (DDR) termination regulator specifically designed for low input voltage and 51402 lownoise systems where space is a key consideration. ALYW The NCP51402 maintains a fast transient response and only requires a minimum output capacitance of 20 F. The NCP51402 supports a remote sensing function and all power requirements for DDR V bus TT 51402 = Specific Device Code termination. The NCP51402 can also be used in lowpower chipsets A = Assembly Location and graphics processor cores that require dynamically adjustable L = Wafer Lot output voltages. Y = Year The NCP51402 is available in the thermallyefficient DFN10 W = Work Week Exposed Pad package, and is rated both Green and Pbfree. = PbFree Package (Note: Microdot may be in either location) Features Input Voltage Rails: Supports 2.5 V, 3.3 V and 5 V Rails PIN CONNECTION PV Voltage Range: 1.1 to 3.5 V CC Integrated Power MOSFETs + V 1 10 V Fast LoadTransient Response RI CC P Logic output pin to Monitor V Regulation 2 9 PV P GOOD TT CC GOOD EN Logic input pin for Shutdown mode V 3 GND 8 GND TT V Reference Input Allows for Flexible Input Tracking Either P 4 7 EN RI GND Directly or Through Resistor Divider V 5 6 V TTS RO Remote Sensing (V ) TTS Exposed Pad Builtin Under Voltage Lockout and Over Current Limit Thermal Shutdown Small, LowProfile 10pin, 3x3 DFN Package ORDERING INFORMATION These Devices are PbFree and are RoHS Compliant Device Package Shipping Applications NCP51402MNTXG DFN10 3000 / Tape & DDR Memory Termination (PbFree) Reel Desktop PCs, Notebooks, and Workstations For information on tape and reel specifications, including part orientation and tape sizes, please Servers and Networking equipment refer to our Tape and Reel Packaging Specifications Telecom/Datacom, GSM Base Station Brochure, BRD8011/D. Graphics Processor Core Supplies Set Top Boxes, LCDTV/PDPTV, Copier/Printers Chipset/RAM Supplies as Low as 0.5 V Active Bus Termination (see notes on page 7) Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: August, 2021 Rev. 2 NCP51402/DNCP51402 PIN FUNCTION DESCRIPTION Pin Number Pin Name Pin Function 1 V V External Reference Input ( set to V / 2 thru resistor network ). RI TT DDQ 2 PV Power input. Internally connected to the output source MOSFET. CC 3 V Power Output of the Linear Regulator. TT 4 P Power Ground. Internally connected to the output sink MOSFET. GND 5 V V Sense Input. The V pin provides accurate remote feedback sensing of V . Connect V to the TTS TT TTS TT TTS remote DDR termination bypass capacitors. 6 V Independent Buffered V Reference Output. Sources and sinks over 5 mA. Connect to GND thru RO TT 0.1 F ceramic capacitor. 7 EN Shutdown Control Input. CMOS compatible input. Logic high = enable, logic low = shutdown. Connect to V for normal operation. DDQ 8 GND Common Ground. 9 P Power Good (Open Drain output). GOOD 10 V Analog power supply input. Connect to GND thru a 1 4.7 F ceramic capacitor. CC THERMAL Pad for thermal connection. The exposed pad must be connected to the ground plane using multiple PAD vias for maximum power dissipation performance. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit V , PV , V , V , V , V (Note 1) 0.3 to 6.0 V CC CC TT TTS RI RO EN, P (Note 1) 0.3 to 6.0 V GOOD P to GND (Note 1) 0.3 to +0.3 V GND Storage Temperature T 55 to 150 C STG Operating Junction Temperature Range T 150 C J ESD Capability, Human Body Model (Note 2) ESD 2000 V HBM Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following method: ESD Human Body Model tested per AECQ100002 (EIA/JESD22A114) ESD Machine Model tested per AECQ100003 (EIA/JESD22A115) Latchup Current Maximum Rating tested per JEDEC standard: JESD78. DISSIPATION RATINGS Derating Factor above Package T = 25 C Power Rating T = 25 C T = +85 C Power Rating A A A 10Pin DFN 1.92 W 19 mW/C 0.79 W RECOMMENED OPERATING CONDITIONS Rating Symbol Value Unit Supply Voltage V 2.375 to 5.5 V CC Voltage Range V 0.1 to 1.8 V RO V 0.5 to 1.8 RI PV , V , V , EN, P 0.1 to 3.5 CC TT TTS GOOD P 0.1 to +0.1 GND Operating FreeAir Temperature T 40 to +125 C A Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 2