NCP81147 Precise Low Voltage Synchronous Buck Controller with Power Saving Mode www.onsemi.com The NCP81147 is a simple single phase solution with differential phase current sensing, power saving operation, and gate drivers to MARKING provide accurately regulated power. DIAGRAMS The adaptive non overlap gate drive and power saving operation circuit provide a low switching loss and high efficiency solution for server, notebook, and desktop systems. A high performance 81147 QFN16 ALYW operational error amplifier is provided to simplify compensation of the CASE 485G 1 system. The NCP81147 features also include softstart sequence, accurate overvoltage and over current protection, UVLO for VCC and VCCP, and thermal shutdown. 81147 = Specific Device Code A = Assembly Location Features L = Wafer Lot Y = Year High Performance Operational Error Amplifier W = Work Week Internal SoftStart/Stop = PbFree Package 0.5% Internal Voltage Accuracy, 0.8 V voltage reference (Note: Microdot may be in either location) OCP accuracy, Four Reentry Times Before Latch Lossless Differential Inductor Current Sensing PIN CONNECTIONS Internal High Precision Current Sensing Amplifier Oscillator Frequency Range of 100 kHz 1000 kHz 20 ns Adaptive FET Nonoverlap Time of Internal Gate Driver 5.0 V to 12 V Operation 16 15 14 13 Support 1.5 V to 19 V V in V from 0.8 V to 3.3 V (5 V with 12 V ) out CC 1 12 VCCP CSN/VO Chip Enable through OSC pin 211 LG FBG Latched Over Voltage Protection (OVP) Internally Fixed OCP Threshold LX310 VSEN Guaranteed Startup Into PreCharged Loads 4 9 BOOT FB Thermally Compensated Current Monitoring 586 7 Thermal Shutdown Protection Integrated MOSFET Drivers Integrated BOOST Diode with internal R = 2.2 bst Automatic Power Saving Mode to Maximize Efficiency During Light (Top View) Load Operation Sync Function ORDERING INFORMATION Remote Ground Sensing This is a PbFree Device* Device Package Shipping NCP81147MNTXG QFN16 3000 / Tape & Reel Applications (PbFree) Desktop and Server Systems For information on tape and reel specifications, *For additional information on our PbFree strategy and soldering details, please including part orientation and tape sizes, please download the ON Semiconductor Soldering and Mounting Techniques refer to our Tape and Reel Packaging Specification Reference Manual, SOLDERRM/D. Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: August, 2016 Rev. 1 NCP81147/D UG GND VCC PGOOD ROSC/EN SYNC COMP CSPNCP81147 15 6 2.2 BOOT 4 Over Current Detector CSP 13 5 UG CDIFF + Current Sense CSN/VO Amplifier LX 12 3 UVP OSC Control Logic, COMP Protection, 8 + VREF*75% RAMP FBG 11 + UVLO Generator and Control 0.8V Error Amplifier PWM Logic VCCP 1 FB 9 + OVP VREF*125% LG 2 OVP, UNLATCHED 10 VSEN 1.24V VREF*50% + ROSC/EN 14 Programmable OSC SYNC GND 7 16 Figure 1. NCP81147 BLOCK DIAGRAM PIN DESCRIPTIONS Pin No. Symbol Description 1 VCCP Power supply for bottom gate MOSFET drivers 2 LG Bottom gate MOSFET driver pin 3 LX Switch node 4 BOOT Supply rail for the floating top gate driver 5 UG Top gate MOSFET driver pin 6 PGOOD Power Good. It is an opendrain output, set free after SS (with 3x clock delay) as long as the output voltage monitored through VSEN is within specifications. 7 SYNC Synchronization Pin. The controller synchronizes on the falling edge of a square wave provided to this pin. Short to GND if not used. 8 COMP Output of the error amplifier 9 FB Inverting input to the error amplifier 10 VSEN Output Voltage Sense 11 FBG Remote Ground Sense 12 CSN/VO Inductor differential sense inverting input 13 CSP Inductor differential sense noninverting input 14 ROSC/EN Programs the switching frequency EN: Pulllow to disable the device 15 VCC Supply rail for the controller internal circuitry 16 GND Ground reference THERMAL PAD Connects with the silicon substrate for good thermal contact with the PCB. Connect to GND plane. www.onsemi.com 2 VCC PGOOD