NIV2161, NIS2161 ESD Protection with Automotive Short-to- Battery & Ground Protection Low Capacitance ESD Protection w/ short www.onsemi.com tobattery and shorttoground Protection for Automotive High Speed MARKING Data Lines DIAGRAM The NIS/NIV2161 is designed to protect high speed data lines WDFN10 V2 M from ESD as well as short to vehicle battery situations. The ultralow CASE 511CA capacitance and low ESD clamping voltage make this device an ideal solution for protecting voltage sensitive high speed data lines while the low R FET limits distortion on the signal lines. The V2 = Specific Device Code DS(on) M = Date Code flowthrough style package allows for easy PCB layout and matched = PbFree Package trace lengths necessary to maintain consistent impedance between (Note: Microdot may be in either location) high speed differential lines such as USB and LVDS protocols. Features PIN CONFIGURATION Low Capacitance (0.40 pF Typical, I/O to GND) AND SCHEMATICS Protection for the Following Standards: 10 9 8 7 6 IEC 6100042 (Level 4) & ISO 10605 Integrated MOSFETs for ShorttoBattery and ShorttoGround Protection NIV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements AECQ101 12 3 4 5 (Top View) Qualified and PPAP Capable These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant Pin 1 and Pin 10 Source 1 Pin 3 5V Pin 3 5V Typical Applications Automotive High Speed Signal Pairs Pin 2 D+ Host Pin 9 D+ USB 2.0/3.0 Pin 4 D Host Pin 7 D LVDS APIX 2/3 Pin 3 5V Pin 3 5V Pin 8 GND ABSOLUTE MAXIMUM RATINGS (T = 25C unless otherwise noted) J Pin 5 and Pin6 Source 2 Rating Symbol Value Unit Operating Junction Temperature Range T 55 to +150 C J(max) Storage Temperature Range 55 to +150 C TSTG ORDERING INFORMATION DraintoSource Voltage V 30 V DSS Device Package Shipping GatetoSource Voltage V 10 V GS NIV2161MTTAG WDFN10 3000 / Tape & Reel Lead Temperature Soldering T 260 C (PbFree) SLD NIS2161MTTAG WDFN10 3000 / Tape & Reel IEC 6100042 Contact (ESD) ESD 8 kV (PbFree) IEC 6100042 Air (ESD) ESD 15 kV For information on tape and reel specifications, Stresses exceeding those listed in the Maximum Ratings table may damage the including part orientation and tape sizes, please device. If any of these limits are exceeded, device functionality should not be refer to our Tape and Reel Packaging Specification assumed, damage may occur and reliability may be affected. Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: November, 2018 Rev. 3 NIV2161/DNIV2161, NIS2161 ELECTRICAL CHARACTERISTICS (T = 25 C unless otherwise specified) A Parameter Symbol Conditions Min Typ Max Unit Reverse Working Voltage V I/O Pin to GND 16 V RWM Breakdown Voltage V I = 1 mA, I/O Pin to GND 16.5 23 V BR T Reverse Leakage Current I V = 5 V, I/O Pin to GND 1.0 A R RWM Clamping Voltage V I = 1 A, I/O Pin to GND (8/20 s pulse) 29 V C PP Clamping Voltage (Note 1) V IEC6100042, 8 KV Contact See Figures 1 & 2 C Clamping Voltage TLP (Note 2) V I = 8 A 39 V C PP See Figures 5 & 6 I = 16 A 66 V PP Junction Capacitance Match C V = 0 V, f = 1 MHz between I/O 1 to GND 1.0 % J R and I/O 2 to GND Junction Capacitance C V = 0 V, f = 1 MHz between I/O Pins and 0.40 pF J R GND (Pin 7 to GND, Pin 9 to GND) DraintoSource Breakdown Voltage V V = 0 V, I = 100 A 30 V BR(DSS) GS D DraintoSource Breakdown Voltage V / Reference to 25 C, I = 100 A 27 mV/ C BR(DSS) D Temperature Coefficient T J Zero Gate Voltage Drain Current I V = 0 V, V = 30 V 1.0 A DSS GS DS GatetoSource Leakage Current I V = 0 V, V = 5 V 1.0 A GSS DS GS Gate Threshold Voltage (Note 3) V V = V , I = 100 A 0.1 1.0 1.5 V GS(TH) DS GS D Gate Threshold Voltage Temperature V / Reference to 25 C, I = 100 A 2.5 mV/ C GS(TH) D Coefficient T J DraintoSource On Resistance R V = 4.5 V, I = 125 mA 1.4 7.0 DS(on) GS D V = 2.5 V, I = 125 mA 2.3 7.5 GS D Forward Transconductance g V = 3.0 V, I = 125 mA 80 mS FS DS D Switching TurnOn Delay Time (Note 4) t V = 4.5 V, V = 24 V 9 nS d(ON) GS DS I = 125 mA, R = 10 V D G Switching TurnOn Rise Time (Note 4) t 41 nS r Switching TurnOff Delay Time (Note 4) t 96 nS d(OFF) Switching TurnOff Fall Time (Note 4) t 72 nS f DraintoSource Forward Diode Voltage V V = 0 V, I = 125 mA 0.79 0.9 V SD GS s 3 dB Bandwidth f R = 50 5 GHz BW L Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. For test procedure see Figures 3 and 4 and application note AND8307/D. 2. ANSI/ESD STM5.5.1 Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 , tp = 100 ns, tr = 4 ns, averaging window t1 = 30 ns to t2 = 60 ns. 3. Pulse test: pulse width 300 S, duty cycle 2% 4. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2