PCS3PS550AG-08CR ON Semiconductor

PCS3PS550A General Purpose Peak EMI Reduction IC Product Description The PCS3PS550A is a versatile 2.3 V to 3.6 V, TimingSafe , spectrum frequency modulator designed specifically for a wide range PCS3PS550A VDD SR1 SR0 SR2 ModOUT CLKIN PLL VSS PD Figure 1. Block Diagram PCS3PS550A modulates the output of a single PLL in PCS3PS550A accepts an input from an external reference order to spread the bandwidth of a synthesized clock, and clock and locks to a 1x modulated clock output. SR0, SR1 more importantly, decreases the peak amplitudes of its and SR2 pins enable selecting one of the eight different harmonics. This results in significantly lower system EMI frequency deviations (Refer Frequency Deviation Selection compared to the typical narrow band signal produced by table). PCS3PS550A also features power down option for oscillators and most frequency generators. Lowering EMI power save. PCS3PS550A operates over a supply voltage by increasing a signals bandwidth is called spread range of 2.3 V to 3.6 V. PCS3PS550A is available in an 8 Pin spectrum clock generation. WDFN, (2 mm x 2 mm) Package. Table 1. PIN DESCRIPTION Pin Pin Name Type Description 1 CLKIN I External reference clock input. 2 SR2 I Digital logic input used to select Spreading Range. There is NO default state. Refer Frequency Deviation Selection Table. 3 PD I Powerdown control pin. Powers down the entire chip. There is NO default state. Pull low to enable powerdown mode. Connect to VDD to disable Power Down. Output Clock will be LOW when power down is enabled 4 VSS P Ground connection. 5 ModOUT O Spread Spectrum Clock Output. 6 SR1 I Digital logic input used to select Spreading Range. This pin has an internal pull up resistor. Refer Modulation Selection Table. 7 SR0 I Digital logic input used to select Spreading Range. There is NO default state. Refer Frequency Deviation Selection Table. 8 VDD P Power supply for the entire chip