PE42524 Document Category: Product Specification UltraCMOS SPDT RF Switch, 10 MHz40 GHz Features Figure 1 PE42524 Functional Diagram Wideband support up to 40 GHz High port to port isolation RFC 48 dB 26.5 GHz 39 dB 35 GHz 33 dB 40 GHz RF1 RF2 Excellent linearity performance P1dB of 31.5 dBm 26.5 GHz P1dB of 28.0 dBm 35 GHz IIP3 of 50 dBm 13.5 GHz ESD /T time of 55 ns Fast RF T rise fall Low insertion loss V1 V2 1.8 dB 26.5 GHz 3.1 dB 35 GHz Flip-chip die Applications Test and measurement Microwave backhaul Radar Military communications Product Description The PE42524 is a HaRP technology-enhanced reflective SPDT RF switch die that supports a wide frequency range from 10 MHz to 40 GHz. This wideband flip-chip switch delivers high isolation performance, excellent linearity and low insertion loss, making this device ideal for test and measurement (T&M), microwave backhaul, radar and military communications (mil-comm) applications. At 30 GHz, the PE42524 exhibits 17 dB active port return loss, 47 dB isolation and 2.2 dB insertion loss. No blocking capacitors are required if DC voltage is not present on the RF ports. The PE42524 is manufactured on Peregrines UltraCMOS process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate. 2014-2015, Peregrine Semiconductor Corporation. All rights reserved. Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121 Product Specification DOC-48614-4 (12/2015) www.psemi.comPE42524 SPDT RF Switch Peregrines HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Absolute Maximum Ratings Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ESD Precautions When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 1. Latch-up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table 1 Absolute Maximum Ratings for PE42524 Parameter/Condition Min Max Unit Control voltage (V1, V2) 3.5 3.5 V RF input power (RFCRFX, 50 ) Fig. 2 dBm Storage temperature range 65 +150 C (*) 2000 V ESD voltage HBM, all pins Note: * Human body model (MIL-STD883 Method 3015). Page 2 DOC-48614-4 (12/2015) www.psemi.com
