Product Specification PE42556 Flip Chip SPDT UltraCMOS RF Switch 9 kHz - 13500 MHz Product Description Features The PE42556 RF Switch is designed for use in Test/ATE, HaRP-Technology-Enhanced cellular and other wireless applications. This broadband general Eliminates Gate Lag purpose switch maintains excellent RF performance and linearity from 9kHz through 13500 MHz. The PE42556 No insertion loss or phase drift integrates on-board CMOS control logic driven by a single-pin, Fast settling time low voltage CMOS control input. It also has a logic select pin Next Gen 0.25 m Process Technology which enables changing the logic definition of the control pin. Single-pin 3.3 V CMOS logic control Additional features include a novel user defined logic table, High Isolation: 26 dB 13.5 GHz enabled by the on-board CMOS circuitry. The PE42556 also Low Insertion Loss: 1.7 dB 13.5 GHz exhibits excellent isolation of 26 dB at 13500 MHz, fast settling time, and is offered in a tiny Flip Chip package. P1dB: 33 dBm typical Return Loss: 13 dB 13.5 GHz (typ) The PE42556 is manufactured on Peregrines UltraCMOS IIP3: +56 dBm typical process, a patented variation of silicon-on-insulator (SOI) Exceptional ESD: 4000 V HBM technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Absorptive Switch Design Flip Chip packaging Figure 1. Functional Diagram Figure 2. Die Photo (Bumps Up) Flip Chip Packaging RFC RF1 RF2 ESD ESD 50 50 CMOS Control Driver LS CTRL Document No. 70-0289-05 www.psemi.com 2009-2010 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 10 PE42556 Product Specification Table 1. Electrical Specifications: Temp = 25C, V = 3.3V DD Parameter Conditions Min Typical Max Units 13500 Operation Frequency 9 kHz As shown MHz 9 kHz - 10 MHz 0.85 0.93 dB 10 - 3000 MHz 0.92 1.06 dB Insertion Loss 3000 - 7500 MHz 0.98 1.23 dB 7500 - 10000 MHz 1.07 1.41 dB 10000 - 13500 MHz 1.74 2.65 dB 9 kHz - 10 MHz 76.5 88.5 dB 10 - 3000 MHz 43.5 46.0 dB Isolation RF1 to RF2 3000 - 7500 MHz 30.0 31.5 dB 7500 - 10000 MHz 24.0 25.5 dB 10000 - 13500 MHz 15.5 17.5 dB 9 kHz - 10 MHz 72.5 84.0 dB 10 - 3000 MHz 39.0 40.5 dB Isolation RFC to RF1 3000 - 7500 MHz 31.5 33.0 dB 7500 - 10000 MHz 27.0 30.5 dB 10000 - 13500 MHz 21.5 26.5 dB 9 kHz - 10 MHz 75.5 87.0 dB 10 - 3000 MHz 39.5 41.0 dB Isolation RFC to RF2 3000 - 7500 MHz 31.5 33.0 dB 7500 - 10000 MHz 27.5 30.5 dB 10000 - 13500 MHz 21.0 26.0 dB 9 kHz - 10 MHz 22.5 dB 10 - 3000 MHz 22.0 dB Return Loss 3000 - 7500 MHz 17.0 dB 7500 - 10000 MHz 16.0 dB 10000 - 13500 MHz 13.0 dB 50% CTRL to 0.05 dB final value (-40 to +85 C) Rising Edge 8.5 10.0 s Settling Time 50% CTRL to 0.05 dB final value (-40 to +85 C) Falling Edge 9.5 13.5 s Switching Time 50% CTRL to 90% or 10% of final value (-40 to +85 C) 3.3 4.0 s Input 1 dB 13500 MHz 33 dBm 1,2 Compression 1 Input IP3 13500 MHz 56 dBm 1 Input IP2 13500 MHz 107.5 dBm Note: 1. Linearity and power performance are derated at lower frequencies (< 1 MHz) 2. Please refer to Maximum Operating Pin (50 ) in Table 3 2009-2010 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0289-05 UltraCMOS RFIC Solutions Page 2 of 10