DATASHEET HA456 FN4153 Rev 7.00 120MHz, Low Power, 8x8 Video Crosspoint Switch September 26, 2008 The HA456 is the first 8x8 video crosspoint switch suitable Features for high performance video systems. Its high level of Fully Buffered Inputs and Outputs (A = +1) V integration significantly reduces component count, board space, and cost. The crosspoint switch contains a digitally Routes Any Input Channel to Any Output Channel controlled matrix of 64 fully buffered switches that connect 8 Switches Standard and High Resolution Video Signals video input signals to any, or all, matrix outputs. Each matrix Serial or Parallel Digital Interface output connects to an internal, high-speed (200V/s), unity gain buffer capable of driving 400 and 5pF to 2V. Expandable for Larger Switch Matrices For applications requiring gain or increased drive capability, Wide Bandwidth 120MHz the HA456 outputs can be connected directly to two High Slew Rate 200V/s HFA1412 quad, gain of two video buffers, which are capable of driving 75 loads. Differential Gain and Phase 0.05%, 0.05 This crosspoints true high impedance three-state output Low Crosstalk at 10MHz . -55dB capability, makes it feasible to parallel multiple HA456s and Pb-Free Available (RoHS Compliant) form larger switch matrices. Applications Ordering Information Professional Video Switching and Routing TEMP. Security and Video Editing Systems PART PART RANGE PKG. NUMBER MARKING (C) PACKAGE DWG. Pinout HA456CM HA456CM 0 to +70 44 Ld PLCC N44.65 HA456 HA456CMZ HA456CMZ 0 to +70 44 Ld PLCC N44.65 (44 LD PLCC) (Note) (Pb-free) TOP VIEW NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed 6 5 4 3 2 1 44 43 42 41 40 the Pb-free requirements of IPC/JEDEC J STD-020. 7 39 A0 OUT2 IN1 8 38 V- NC 9 37 OUT3 10 36 IN2 AGND 11 DGND 35 OUT4 12 34 NC NC IN3 13 33 AGND 14 32 DGND OUT5 15 31 AGND IN4 EDGE/LEVEL 16 30 OUT6 17 29 IN5 V+ 18 19 20 21 22 23 24 25 26 27 28 FN4153 Rev 7.00 Page 1 of 13 September 26, 2008 IN0 V+ IN6 A1 A2 SER/PAR IN7 D0/SER IN V- D1/SER OUT NC NC V+ WR OUT0 LATCH D2 CE OUT1 CE D3 OUT7HA456 HA456 Functional Block Diagram IN0 IN1 IN2 IN3 IN4 IN5 IN6 IN7 OUTPUT BUFFERS (A = 1) V OUT0 EN0 HA456 8x8 SWITCH MATRIX OUT7 EN7 EN0:7 LATCH SLAVE REGISTER EDGE/LEVEL WR SER/PAR CE MASTER REGISTER CE D0/SER IN D1/SER OUT A0 A1 A2 D2 D3 FN4153 Rev 7.00 Page 2 of 13 September 26, 2008
