Datasheet 1.0V to 5.5V, 1A 1ch Termination Regulators for DDR-SDRAMs BD3533F BD3533FVM BD3533HFN General Description Key Specifications BD3533 is a termination regulator that complies with Termination Input Voltage Range: 1.0V to 5.5V JEDEC requirements for DDR-SDRAM. This linear power VCC Input Voltage Range: 2.7V to 5.5V supply uses a built-in N-channel MOSFET and high-speed VDDQ Reference Voltage Range: 1.0V to 2.75V OP-AMPS specially designed to provide excellent Output Voltage: 1/2 x VDDQ V (Typ) transient response. It has a sink/source current capability Output Current: up to 1A and has a power supply bias requirement of 3.3V BD3533F 3.0A(Max) to 5.0V for driving the N-channel MOSFET. By employing BD3533FVM/HFN 1.0A(Max) an independent reference voltage input (VDDQ) and a High Side FET ON-Resistance: 0.4(Typ) feedback pin (VTTS), this termination regulator provides Low Side FET ON-Resistance: 0.4(Typ) excellent output voltage accuracy and load regulation as Standby Current: 0.5mA(Typ) required by JEDEC standards. Additionally, BD3533 has a Operating Temperature Range: -20C to +100C reference power supply output (VREF) for DDR-SDRAM or for memory controllers. Unlike the VTT output that goes Packages W(Typ) x D(Typ) x H(Max) to Hi-Z state, the VREF output is kept unchanged when EN input is changed to Low, making this IC suitable for DDR-SDRAM under Self Refresh state. Features Incorporates a Push-Pull Power Supply for Termination (VTT) Incorporates a Reference Voltage Circuit (VREF) SOP8 Incorporates an Enabler 5.00mm x 6.20mm x 1.71mm Incorporates an Under Voltage Lockout (UVLO) Incorporates a Thermal Shutdown Protector (TSD) Compatible with Dual Channel (DDR-2) Applications Power Supply for DDR 1/2 - SDRAM MSOP8 HSON8 2.90mm x 4.00mm x 0.90mm 2.90mm x 3.00mm x 0.60mm Typical Application Circuit, Block Diagram VTT IN VCC VDDQ VCC VTT IN VDDQ 6 5 7 V V V CC CC CC UVLO SOFT Reference VTT Block TSD 8 VTT TSD V EN CC UVLO EN UVLO UVLO TSD EN UVLO TSD Thermal 3 Protection VTTS x Enable 4 V DDQ EN EN VREF 2 1 GND Product structureSilicon monolithic integrated circuit This product has no designed protection against radioactive rays www.rohm.com TSZ02201-0J2J0A900700-1-2 2014 ROHM Co., Ltd. All rights reserved. 1/17 TSZ2211114001 08.Apr.2016 Rev.003 BD3533F BD3533FVM BD3533HFN Pin Configuration Pin Descriptions Pin No. Pin Name Pin Function TOP VIEW 1 GND GND pin 2 EN Enable input pin 1 GND 8 VTT 3 VTTS Detector pin for termination voltage 4 VREF Reference voltage output pin EN 2 7 VTT IN 5 VDDQ Reference voltage input pin VTTS 3 6 6 VCC VCC pin VCC 7 VTT IN Termination input pin VREF VDDQ 4 5 8 VTT Termination output pin Bottom Substrate FIN (only BD3533HFN) (connected to GND) Description of Blocks 1. VCC The VCC pin is for the independent power supply input that operates the internal circuit of the IC. It is the voltage at this pin that drives the ICs amplifier circuits. The VCC input ranges from 3.3V to 5V and maximum current consumption is 4mA. A bypass capacitor of 1F or so should be connected to this pin when using the IC in an application circuit. 2. VDDQ This is the power supply input pin for an internal voltage divider network. The voltage at VDDQ is halved by two 50k internal voltage-divider resistors and the resulting voltage serves as reference for the VTT output. Since V = 1/2V , TT DDQ the JEDEC requirement for DDR-SDRAM can be satisfied by supplying the correct voltage to VDDQ. Noise input should be avoided at the VDDQ pin as it is also included by the voltage-divider at the output. An RC filter consisting of a resistor and a capacitor (220 and 2.2F, for instance,) may be used to reduce the noise input but make sure that it will not significantly affect the voltage-dividers output. 3. VTT IN VTT IN is the power supply input pin for the VTT output. Input voltage may range from 1.0V to 5.5V, but consideration must be given to the current limit dictated by the ON-Resistance of the IC and to the change in allowable loss due to input/output voltage difference. Generally, the following voltages are supplied: DDR1 VTT IN = 2.5V DDR2 VTT IN = 1.8V Take note that a high-impedance voltage input at VTT IN may result in oscillation or degradation in ripple rejection, so connecting a 10F capacitor with minimal change in capacitance to VTT IN terminal is recommended. However, this impedance may depend on the characteristics of the power supply input and the impedance of the PC board wiring, which must be carefully checked before use. 4. VREF BD3533 provides a constant voltage, VREF, which is independent from the VTT output and can serve as reference input for memory controllers and DRAMs. The voltage level of VREF is kept constant even if the EN pin is at Low level, making the use of this IC compatible with the Self Refresh state of DRAMs. In order to stabilize the output voltage, connecting the correct combination of capacitor and resistor to VREF is necessary. For this purpose, a combination of 1.0F to 2.2F ceramic capacitor, characterized by minimal variation in capacitance, and a 0.5 to 2.2 phase compensating resistor is recommended. A 10F ceramic or tantalum capacitor can also be used. The maximum current capability of the VREF pin is 20mA, but for an application which consumes a small amount of VREF current, using a capacitance of 1F or less will do. 5. VTTS VTTS is a sense pin for the load regulation of the VTT output voltage. In case the wire connecting VTT pin and the load is too long, connecting VTTS pin to the part of the wire nearer to the load may improve load regulation. www.rohm.com TSZ02201-0J2J0A900700-1-2 2014 ROHM Co., Ltd. All rights reserved. 2/17 TSZ2211115001 08.Apr.2016 Rev.003